Waveforms & Timing Diagrams

Slides:



Advertisements
Similar presentations
Logic Gates.
Advertisements

Chapter 3 Logic Gates and Boolean Algebra – Part 1
Logic Gates.
ECE 3110: Introduction to Digital Systems Chapter 6 Combinational Logic Design Practices XOR, Parity Circuits, Comparators.
Chapter 3 Basic Logic Gates 1.
Chapter 3 Basic Logic Gates
ECE 2373 Modern Digital System Design Exam 2. ECE 2372 Exam 2 Thursday March 5 You may use two 8 ½” x 11” pages of information, front and back, write.
Digital Electronics Dan Simon Cleveland State University ESC 120 Revised December 30, 2010.
Physical States for Bits. Black Box Representations.
3.1 Logic Signals and Gates Logic Signals ReturnNext  Logic Value: Many physical quantities can be represented two possible numbers or logic values —
Chapter 4 Logic Gates and Boolean Algebra. Introduction Logic gates are the actual physical implementations of the logical operators. These gates form.
Gates CS105. Electrical Signals Transmission of data Any electrical signal has a level of voltage – Interpretation of 1s and 0s Generally speaking: –
CIS 6001 Gates Gates are the building blocks for digital circuits Conventions used is high voltage = 1 and ground = 0 Inverter and NOT Gate are two terms.
Number Systems & Logic Gates Day 2. Octal Number System Base (Radix)8 Digits0, 1, 2, 3, 4, 5, 6, 7 e.g = =648 1 =88 0 =1 The digit.
Lab 04 :Serial Data Control Systems : Slide 2 Slide 3 Slide 4 NOR Gate: NAND Gate: NOR / NAND Alternate Symbols: Slide 5 XOR and XNOR Gate: Serial Data.
Module 3.  Binary logic consists of :  logic variables  designated by alphabet letters, e.g. A, B, C… x, y, z, etc.  have ONLY 2 possible values:
LOGIC GATES Logic generally has only 2 states, ON or OFF, represented by 1 or 0. Logic gates react to inputs in certain ways. Symbol for AND gate INPUT.
Logic gates & Boolean Algebra. Introduction Certain components (called logic elements) of the computer combine electric pulses using a set of rules. Electric.
Transistors and Logic Circuits. Transistor control voltage in voltage out control high allows current to flow -- switch is closed (on) control low stops.
TODAY YOU ARE LEARNING to explain why data is represented in computer systems in binary form 2. to understand and produce simple logic diagrams.
1 CS151: Digital Design Chapters 4, 5 Review. CS Question 1 Design a combinational circuit for a Roller-Coaster ride in an amusement park. The design.
Chapter 3 (part 2) Basic Logic Gates 1.
Eng. Mohammed Timraz Electronics & Communication Engineer University of Palestine Faculty of Engineering and Urban planning Software Engineering Department.
Week 6: Gates and Circuits: PART I READING: Chapter 4.
Sneha.  Gates Gates  Characteristics of gates Characteristics of gates  Basic Gates Basic Gates  AND Gate AND Gate  OR gate OR gate  NOT gate NOT.
Exclusive OR Gate. Logically, the exclusive OR (XOR) operation can be seen as either of the following operations:exclusive OR (XOR) 1. A AND NOT B OR.
Gates and Logic Dr John Cowell phones off (please)
WELCOME. LOGIC GATE WHAT WE ARE GOING TO LEARN? The Logic Gate. Analogue and Digital signal. Bit and Byte. Boolean Theorem. Description and Circuit analyses.
Logic Gates. AND gate Produces an output only if both inputs are on Input AInput BOutput (Q) Q=
CHAPTER 5 Combinational Logic Analysis
AND Gate Inputs Output Input A (Switch) Input B (Switch) Output Y (Lamp) 0 (Open) 0 (OFF) A B Lamp.
ECE 2110: Introduction to Digital Systems Chapter 6 Combinational Logic Design Practices XOR and parity check Circuits.
Logic Gates Chapter 5 Subject: Digital System Year: 2009.
© 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Digital Logic Design Dr. Oliver Faust.
Logic Gates Digital Logic Design. What is a logic gate? A switch with an output that will only turn on when inputs are in particular positions.
Chapter 3 Digital circuits. 3.1 Logic signals - Gates Binary system : (binary bits or digits) - 0 & 1 - LOW & HIGH - Negated and Asserted.
Eng. Mai Z. Alyazji October, 2016
Logic Gates and Boolean Algebra
Logic Gates.
Transistors and Logic Circuits
Lab02 :Logic Gate Fundamentals:
Logic Gates.
EI205 Lecture 5 Dianguang Ma Fall 2008.
Exclusive OR Gate.
KS4 Electricity – Electronic systems
KS4 Electricity – Electronic systems
Digital Signals Digital Signals have two basic states:
Basic Digital Logic Basic Gates
Schematics 201 Lecture Topic: Electrical Symbols
Logic Gates.
JC Technology Logic Gates.
Logic Gates.
KS4 Electricity – Electronic systems
13 Digital Logic Circuits.
Gates Type AND denoted by X.Y OR denoted by X + Y NOR denoted by X + Y
GCSE Computer Science – Logic Gates & Boolean Expressions
DIGITAL ELECTRONICS B.SC FY
Today You are Learning simple logic diagrams using the operations AND, OR and NOT truth tables combining Boolean operators using AND, OR and NOT.
Logic Gates.
Binary Logic.
Digital Logic Experiment
Logic Gates Logic Gates Gateway To Technology
Truth tables Mrs. Palmer.
Department of Electronics
Digital Logic Design Basics Combinational Circuits Sequential Circuits.
Logic Gates AIM: To know the different types of logic gate
Logic Gates By: Asst Lec. Besma Nazar Nadhem
What are Logic Gates?.
DIGITAL ELECTRONICS AND LOGIC GATES. ANALOG SIGNAL:- Analog signal is continuous time varying current or voltage signal.
SYEN 3330 Digital Systems Chapter 2 – Part 1 SYEN 3330 Digital Systems.
Presentation transcript:

Waveforms & Timing Diagrams

Timing Diagrams A timing diagram is a graph of voltage versus time. The horizontal time scale is marked off in regular intervals and voltage is marked off in regular intervals along a vertical scale. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 mSec 1 2 3 4 5 6 Volts Timing diagrams are used to: Show how a digital signal changes with time Compare two or more signals in the same circuit

Waveforms: Oscilloscopes can be used to compare: Oscilloscope one or more digital signals to their expected timing diagram one or more input signals to the output signal Oscilloscope

Timing Diagram for an AND Gate 1 0 0 A B OUTPUT 0 0 0 0 1 0 1 1 1 Waveforms on Logic Analyzer

Timing Diagram for an OR Gate A B OUTPUT 0 0 0 1 0 1 0 1 1 1 1 1 Waveforms on Logic Analyzer

Timing Diagram for a NAND Gate A B OUTPUT 0 0 1 1 0 1 0 1 1 1 1 0 Waveforms on Logic Analyzer

Timing Diagram for a NOR Gate A B OUTPUT 0 0 1 1 0 0 0 1 0 1 1 0 Waveforms on Logic Analyzer

Timing Diagram to Truth Table: Input 1 Input 2 Output A B OUTPUT 0 0 1 0 0 1 1 1 Output is ON only when both inputs are ON This circuit is an AND GATE 1

Timing Diagram to Truth Table: Inputs A, B, C Output A B C OUTPUT 0 0 0 1 0 0 0 0 1 0 1 1 0 1 0 1 1 0 1 0 1 1 1 1 1 1 1 Output is ON when any input is ON This circuit is an OR GATE 1 1 1 1

Timing Diagram to Truth Table: A B OUTPUT 0 0 1 0 0 1 1 1 1 1 Output is ON only when Input A or Input B is ON This circuit is an exclusive OR GATE

Logic to Timing Diagram:

Logic to Timing Diagram: