Chapter 1 Computer Abstractions & Technology Performance Evaluation

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Presentation transcript:

Chapter 1 Computer Abstractions & Technology Performance Evaluation

Performance How to measure, report, and summarize performance Major factors that determine the performance of a computer Make intelligent choices See through the marketing type Key to understanding underlying organizational motivation Why is some hardware better than others for different programs? What factors of system performance are hardware related? (e.g., Do we need a new machine, or a new operating system?) How does the machine's instruction set affect performance?

Which of these airplanes has the best performance? Airplane Passengers Range (mi) Speed (mph) Boeing 737-100 101 630 598 Boeing 747 470 4150 610 BAC/Sud Concorde 132 4000 1350 Douglas DC-8-50 146 8720 544 How much faster is the Concorde compared to the 747? How much bigger is the 747 than the Douglas DC-8?

Two notions of “performance” Plane Boeing 747 BAD/Sud Concorde Speed 610 mph 1350 mph DC to Paris 6.5 hours 3 hours Passengers 470 132 Throughput (pmph) 286,700 178,200 Which has higher performance?

Example Time of Concorde vs. Boeing 747? Concord is 1350 mph / 610 mph = 2.2 times faster = 6.5 hours / 3 hours Throughput of Concorde vs. Boeing 747 ? Concord is 178,200 pmph / 286,700 pmph = 0.62 “times faster” Boeing is 286,700 pmph / 178,200 pmph = 1.60 “times faster” Boeing is 1.6 times (“60%”) faster in terms of throughput Concord is 2.2 times (“120%”) faster in terms of flying time

Morgan Kaufmann Publishers November 16, 2018 Defining Performance Which airplane has the best performance? Chapter 1 — Computer Abstractions and Technology

Response Time and Throughput Morgan Kaufmann Publishers November 16, 2018 Response Time and Throughput Response time How long it takes to do a task Throughput Total work done per unit time e.g., tasks/transactions/… per hour How are response time and throughput affected by Replacing the processor with a faster version? Adding more processors? We’ll focus on response time for now… Chapter 1 — Computer Abstractions and Technology

Morgan Kaufmann Publishers November 16, 2018 Relative Performance Define Performance = 1/Execution Time “X is n time faster than Y” Example: time taken to run a program 10s on A, 15s on B Execution TimeB / Execution TimeA = 15s / 10s = 1.5 So A is 1.5 times faster than B Chapter 1 — Computer Abstractions and Technology

Measuring Execution Time Morgan Kaufmann Publishers November 16, 2018 Measuring Execution Time Elapsed time(wall clock time, response time) Total response time, including all aspects Processing, I/O, OS overhead, idle time Determines system performance CPU time Time spent processing a given job Does not include I/O time, other jobs’ shares Comprises user CPU time and system CPU time Different programs are affected differently by CPU and system performance Chapter 1 — Computer Abstractions and Technology

Morgan Kaufmann Publishers November 16, 2018 CPU Clocking Operation of digital hardware governed by a constant-rate clock Clock period: duration of a clock cycle e.g., 250ps = 0.25ns = 250×10–12s Clock frequency (rate): cycles per second e.g., 4.0GHz = 4000MHz = 4.0×109Hz Clock period Clock (cycles) Data transfer and computation Update state Chapter 1 — Computer Abstractions and Technology

Morgan Kaufmann Publishers November 16, 2018 CPU Time Performance improved by Reducing number of clock cycles Increasing clock rate Hardware designer must often trade off clock rate against cycle count Chapter 1 — Computer Abstractions and Technology

Morgan Kaufmann Publishers November 16, 2018 CPU Time Example Computer A: 2GHz clock, 10s CPU time Designing Computer B Aim for 6s CPU time Can do faster clock, but causes 1.2 × clock cycles How fast must Computer B clock be? Chapter 1 — Computer Abstractions and Technology

Instruction Count and CPI Morgan Kaufmann Publishers November 16, 2018 Instruction Count and CPI Instruction Count for a program Determined by program, ISA and compiler Average Cycles per Instruction(CPI) Determined by CPU hardware If different instructions have different CPI Average CPI affected by instruction mix Chapter 1 — Computer Abstractions and Technology

Morgan Kaufmann Publishers November 16, 2018 CPI Example Computer A: Cycle Time = 250ps, CPI = 2.0 Computer B: Cycle Time = 500ps, CPI = 1.2 Same ISA Which is faster, and by how much? A is faster… …by this much Chapter 1 — Computer Abstractions and Technology

Morgan Kaufmann Publishers November 16, 2018 CPI in More Detail If different instruction classes take different numbers of cycles Weighted average CPI Relative frequency Chapter 1 — Computer Abstractions and Technology

Morgan Kaufmann Publishers November 16, 2018 CPI Example Alternative compiled code sequences using instructions in classes A, B, C Class A B C CPI for class 1 2 3 IC in sequence 1 IC in sequence 2 4 Sequence 1: IC = 5 Clock Cycles = 2×1 + 1×2 + 2×3 = 10 Avg. CPI = 10/5 = 2.0 Sequence 2: IC = 6 Clock Cycles = 4×1 + 1×2 + 1×3 = 9 Avg. CPI = 9/6 = 1.5 Chapter 1 — Computer Abstractions and Technology

Morgan Kaufmann Publishers November 16, 2018 Performance Summary The BIG Picture Performance depends on Algorithm: affects IC, possibly CPI Programming language: affects IC, CPI Compiler: affects IC, CPI Instruction set architecture: affects IC, CPI, Tc Chapter 1 — Computer Abstractions and Technology

Cycles Per Instruction (Throughput) “Average Cycles per Instruction” CPI = (CPU Time * Clock Rate) / Instruction Count = Cycles / Instruction Count “Instruction Frequency”

Example: Calculating CPI bottom up Base Machine (Reg / Reg) Op Freq Cycles CPI(i) (% Time) ALU 50% 1 .5 (33%) Load 20% 2 .4 (27%) Store 10% 2 .2 (13%) Branch 20% 2 .4 (27%) 1.5 Typical Mix of instruction ypes in program

Example: Branch Stall Impact Assume CPI = 1.0 ignoring branches (ideal) Assume branch solution was stalling for 3 cycles If 30% branch, Stall 3 cycles on 30% Op Freq Cycles CPI(i) (% Time) Other 70% 1 .7 (37%) Branch 30% 4 1.2 (63%) => new CPI = 1.9 New machine is 1/1.9 = 0.52 times faster (i.e. slow!)

Morgan Kaufmann Publishers November 16, 2018 Power Trends In CMOS IC technology ×30 5V → 1V ×1000 Chapter 1 — Computer Abstractions and Technology

Morgan Kaufmann Publishers November 16, 2018 Reducing Power Suppose a new CPU has 85% of capacitive load of old CPU 15% voltage and 15% frequency reduction The power wall We can’t reduce voltage further We can’t remove more heat How else can we improve performance? Chapter 1 — Computer Abstractions and Technology

Uniprocessor Performance Morgan Kaufmann Publishers November 16, 2018 Uniprocessor Performance Constrained by power, instruction-level parallelism, memory latency Chapter 1 — Computer Abstractions and Technology

Morgan Kaufmann Publishers November 16, 2018 Multiprocessors Multicore microprocessors More than one processor per chip Requires explicitly parallel programming Compare with instruction level parallelism Hardware executes multiple instructions at once Hidden from the programmer Hard to do Programming for performance Load balancing Optimizing communication and synchronization Chapter 1 — Computer Abstractions and Technology

Morgan Kaufmann Publishers November 16, 2018 Manufacturing ICs Yield: proportion of working dies per wafer Chapter 1 — Computer Abstractions and Technology

Morgan Kaufmann Publishers November 16, 2018 AMD Opteron X2 Wafer X2: 300mm wafer, 117 chips, 90nm technology X4: 45nm technology Chapter 1 — Computer Abstractions and Technology

Integrated Circuit Cost Morgan Kaufmann Publishers November 16, 2018 Integrated Circuit Cost Nonlinear relation to area and defect rate Wafer cost and area are fixed Defect rate determined by manufacturing process Die area determined by architecture and circuit design Chapter 1 — Computer Abstractions and Technology

Morgan Kaufmann Publishers November 16, 2018 SPEC CPU Benchmark Programs used to measure performance Supposedly typical of actual workload Standard Performance Evaluation Corp (SPEC) Develops benchmarks for CPU, I/O, Web, … SPEC CPU2006 Elapsed time to execute a selection of programs Negligible I/O, so focuses on CPU performance Normalize relative to reference machine Summarize as geometric mean of performance ratios CINT2006 (integer) and CFP2006 (floating-point) Chapter 1 — Computer Abstractions and Technology

Morgan Kaufmann Publishers November 16, 2018 CINT2006 for Opteron X4 2356 Name Description IC×109 CPI Tc (ns) Exec time Ref time SPECratio perl Interpreted string processing 2,118 0.75 0.40 637 9,777 15.3 bzip2 Block-sorting compression 2,389 0.85 817 9,650 11.8 gcc GNU C Compiler 1,050 1.72 0.47 24 8,050 11.1 mcf Combinatorial optimization 336 10.00 1,345 9,120 6.8 go Go game (AI) 1,658 1.09 721 10,490 14.6 hmmer Search gene sequence 2,783 0.80 890 9,330 10.5 sjeng Chess game (AI) 2,176 0.96 0.48 37 12,100 14.5 libquantum Quantum computer simulation 1,623 1.61 1,047 20,720 19.8 h264avc Video compression 3,102 993 22,130 22.3 omnetpp Discrete event simulation 587 2.94 690 6,250 9.1 astar Games/path finding 1,082 1.79 773 7,020 xalancbmk XML parsing 1,058 2.70 1,143 6,900 6.0 Geometric mean 11.7 High cache miss rates Chapter 1 — Computer Abstractions and Technology

Morgan Kaufmann Publishers November 16, 2018 SPEC Power Benchmark Power consumption of server at different workload levels Performance: ssj_ops/sec Power: Watts (Joules/sec) Chapter 1 — Computer Abstractions and Technology

Morgan Kaufmann Publishers November 16, 2018 SPECpower_ssj2008 for X4 Target Load % Performance (ssj_ops/sec) Average Power (Watts) 100% 231,867 295 90% 211,282 286 80% 185,803 275 70% 163,427 265 60% 140,160 256 50% 118,324 246 40% 920,35 233 30% 70,500 222 20% 47,126 206 10% 23,066 180 0% 141 Overall sum 1,283,590 2,605 ∑ssj_ops/ ∑power 493 Chapter 1 — Computer Abstractions and Technology

Morgan Kaufmann Publishers November 16, 2018 Pitfall: Amdahl’s Law Improving an aspect of a computer and expecting a proportional improvement in overall performance Example: multiply accounts for 80s/100s How much improvement in multiply performance to get 5× overall? Corollary: make the common case fast  Can’t be done! Chapter 1 — Computer Abstractions and Technology

Amdahl’s Law The performance improvement to be gained from using some faster mode of execution is limited by the fraction of the unaffected time in the faster mode. Execution Time After Improvement = Execution Time Unaffected +( Execution Time Affected / Amount of Improvement )

Amdahl's Law: Example 1 Example: "Suppose a program runs in 100 seconds on a machine, with multiply responsible for 80 seconds of this time. How much do we have to improve the speed of multiplication if we want the program to run 4 times faster?"  How about making it 5 times faster? Principle: Make the common case fast

Example 2 Suppose we enhance a machine making all floating-point instructions run five times faster. If the execution time of some benchmark before the floating-point enhancement is 10 seconds, what will the speedup be if half of the 10 seconds is spent executing floating-point instructions? We are looking for a benchmark to show off the new floating-point unit described above, and want the overall benchmark to show a speedup of 3. One benchmark we are considering runs for 100 seconds with the old floating-point hardware. How much of the execution time would floating-point instructions have to account for in this program in order to yield our desired speedup on this benchmark?

Pitfall: MIPS as a Performance Metric Morgan Kaufmann Publishers November 16, 2018 Pitfall: MIPS as a Performance Metric MIPS: Millions of Instructions Per Second Doesn’t account for Differences in ISAs between computers Differences in complexity between instructions CPI varies between programs on a given CPU Chapter 1 — Computer Abstractions and Technology

MIPS Example MIPS = Instruction counts/(Execution time x 106) Two different compilers are being tested for a 4 GHz. machine With three different classes of instructions: Class A, Class B, and Class C, which require one, two, and three cycles (respectively). Both compilers are used to produce code for a large piece of software. The first compiler's code uses 5 billion Class A instructions, 1 billion Class B instructions, and 1 billion Class C instructions. The second compiler's code uses 10 billion Class A instructions, 1 billion Class B instructions, and 1 billion Class C instructions. Which sequence will be faster according to MIPS? Which sequence will be faster according to execution time?

Morgan Kaufmann Publishers November 16, 2018 Concluding Remarks Cost/performance is improving Due to underlying technology development Hierarchical layers of abstraction In both hardware and software Instruction set architecture The hardware/software interface Execution time: the best performance measure Power is a limiting factor Use parallelism to improve performance Chapter 1 — Computer Abstractions and Technology