COMP541 Input Devices: Keyboards, Mice and Joysticks Montek Singh Nov 2, 2016

USB keyboard plugs into the USB port on Nexys 4 boards Keyboard Interface USB keyboard plugs into the USB port on Nexys 4 boards

USB to PS/2 emulation Host controller on Nexys boards talks to USB keyboard on one side speaks PS/2 protocol to the FPGA on the other side PS/2 used to be the dominant keyboard protocol PS/2 = a synchronous serial protocol What does that mean? Each symbol is transmitted bit-by-bit 8 data bits + 3 control bits synchronized to the keyboard’s clock (slow)

Physical Interface Two lines Read: Clock (15-20KHz) Data Normally high, asserted low Read: pg. 10 of Nexys 4 manual

Protocol Bidirectional Assert low For your lab: Kybd-to-host and host-to-kybd on same wires CAPS LOCK light for example Assert low To send, keyboard starts clocking sends successive bit on positive edge of clock host reads bits on negative edges of clock For your lab: You shouldn’t need to send anything to keyboard

Protocol 11 bits Clocked by keyboard a start bit: always 0 8 bits of data lsb first one parity bit (odd) a stop bit: always 1 Clocked by keyboard Value should be latched by FPGA on neg edge of keyboard clock Illustration from http://www.beyondlogic.org/keyboard/keybrd.htm

What is Sent ASCII is not sent! Scan codes for keys Most keys have an 8-bit (single byte) scancode Some have two bytes A few have even more! Most (not all, be careful!) keyboards use these scancodes: Our keyboards have slightly different scan codes! Check before using! Illustration from Nexys 3 manual

Scan Codes Normally translated by software Software takes care of You remap your keys, for example Software takes care of Shift, caps lock, control

Some Scan Codes Long Two code sequence common Some special keys use even more… …have a look at Break key!

Even More Complicated Scan code generated when you press And when you release Extra byte: F0 followed by key scan code Example: Space pressed, 29 sent Space released, F0 29 sent

Resources Information Scan codes Available on the class website: http://www.beyondlogic.org/keyboard/keybrd.htm Scan codes http://www.barcodeman.com/altek/mule/scandoc.php Available on the class website: my Verilog for keyboard keyboard.sv: keyboard controller hardware keyboard_test.sv: demo with keyboard and 7-seg display displays the scan code of the last event from keyboard

My Verilog Have Verilog for keyboard To use: a test/demo which displays data from keyboard onto 7-segment display have tested it with the FPGA kit; seems to work fine To use: You will memory-map the character code register give the keyboard a memory address so the CPU can read it using lw instructions Handle presses and releases appropriately in software Either: Check for a key release before reading a new key press OR: Delaying next key read (by, say, 1/4th sec) gives you automatic “key repeat” feature!

Mice

Mouse Very similar interface (clk & data) Read Verilog But: 3 words sent w/ mouse movement or button press Read pp. 12-13 of Nexys 4 manual Verilog I can guide you to modify keyboard.sv to read 3 bytes

Movement Movement is relative XS, YS are sign (+ is up/right) XY, YY are overflow (too fast) L, R are buttons

Scroll Wheel, etc. Extensions to original 2 button PS/2 mouse See http://www.computer-engineering.org/ps2mouse/

Joystick

Joystick module 2 axes: x and y On-board microprocessor 10-bit position values On-board microprocessor handles debouncing communicates with host Info on class website reference manual Verilog code demo: feeds joystick output to the 7-seg display you will modify to feed the output into your memory-mapped I/O unit instead

Accelerometer Nexys 4 boards have built-in accelerometer I can help you develop a Verilog module for reading the accelerometer

Keypad

Keypad module 4x4 keypad Simple interface Info on class website 0-9, A-F one hex character input Simple interface 4-bit row, 4-bit column a ‘0’ means pressed Info on class website reference manual Verilog code demo: feeds keypad output to the 7-seg display you will modify to feed the output into your memory-mapped I/O unit instead

Built-In Audio Amplifier Nexys 4 has mono amplifier built-in

Built-In Mono Amplifier Mono output headphone jack compatible Very very low-level…! expects analog waveform on input! your design on FPGA will have to generate an analog value by rapidly toggling between 0 and 1 e.g., 60% of the time ‘1’ value will approximate an analog value of 0.60V (if range is 0-1V) Verilog code I have made a module that I will put on the website for you to use