A Level Computing – a2 Component 2 1A, 1B, 1C, 1D, 1E.

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Presentation transcript:

A Level Computing – a2 Component 2 1A, 1B, 1C, 1D, 1E

Learning Intentions Learners will develop an understanding of parallel processing and the limiting factors of parallelisation Learners will develop an understanding of the runtime of a variety of tasks as a result of parallelisation and evaluate the effect of parallelisation. Context: Computer Architecture

Assessment outcomes 1a - Identify and describe the hardware and communication elements of contemporary computer systems and how they are connected. 1b - Identify and describe the main components of computer architecture, including Von Neumann and contemporary architectures. 1c - Describe different types of memory and caching. 1d (A2) - Describe and explain parallel processing and (the limiting factors to parallelisation.) 1e (A2) - Calculate the runtime of given tasks as a result of parallelisation and evaluate the effect of parallelisation.

Recap: 1A, 1B, 1C 1a - Identify and describe the hardware and communication elements of contemporary computer systems and how they are connected. 1b - Identify and describe the main components of computer architecture, including Von Neumann and contemporary architectures. 1c - Describe different types of memory and caching. Task: Work through the questions for 1A, 1B, 1C. You can use the notes to help Extension: There are grade A Extensions available in 1B and 1C. Complete all of the base questions before attempting these.

1a - Identify and describe the hardware and communication elements of contemporary computer systems and how they are connected. Use the 1A Notes in the shared area to recap your knowledge Complete the questions for 1A. Task: Work through the questions for 1A, 1B, 1C. You can use the notes to help Extension: There are grade A Extensions available in 1B and 1C. Complete all of the base questions before attempting these.

1b - Identify and describe the main components of computer architecture, including Von Neumann and contemporary architectures Use the 1B notes in the shared area to recap your knowledge Complete the questions for 1B Task: Work through the questions for 1A, 1B, 1C. You can use the notes to help Extension: There are grade A Extensions available in 1B and 1C. Complete all of the base questions before attempting these.

1c - Describe different types of memory and caching. Use the 1c notes in the shared area to recap your knowledge Complete the questions for 1C Task: Work through the questions for 1A, 1B, 1C. You can use the notes to help Extension: There are grade A Extensions available in 1B and 1C. Complete all of the base questions before attempting these.

Self Assessment Use the answer files to self assess your answers to the 1A, B, C recap. Use red pen.

1d (A2) - Describe and explain parallel processing and (the limiting factors to parallelisation.) You can find this information on: http://www.teach- ict.com/as_as_computing/ocr/H447/F4 53/3_3_3/parallel_processors/miniweb /index.htm “Parallel processing is the simultaneous processing of data.”

Parallel Processing There are a number of ways to carry out parallel processing, The table below shows each one of them and how they are applied in real life. Advantages of parallel processing over the Von Neumann architecture Faster when handling large amounts of data, with each data set requiring the same processing (array and multi-core methods) Is not limited by the bus transfer rate (the Von Neumann bottleneck) Can make maximum use of the CPU (pipeline method) in spite of the bottleneck Disadvantages Only certain types of data are suitable for parallel processing. Data that relies on the result of a previous operation cannot be made parallel. For parallel processing, each data set must be independent of each other. More costly in terms of hardware - multiple processing blocks needed, this applies to all three methods

Pipelining Every CPU carries out the Fetch-Decode- Execute cycle. The idea of the pipeline is to stagger this cycle into three or more hardware processing paths within the CPU called a 'pipeline'. At any given time, whilst a fetch operation is taking place on pipeline 1 which occupies the data and address buses, pipeline 2 is decoding an instruction and pipeline 3 is executing an instruction. As long as the pipelines can be kept full, this is making maximum use of the CPU. This kind of computer is classified as a Single Instruction Single Data computer or SISD

Array or Vector Processing Some types of data can be processed independently of one another. A good example of this is the simple processing of pixels on a screen. If you wanted to make each coloured pixel a different colour according to what it currently holds. For example "Make all Red Pixels Blue", "Make Blue Pixels Red", "Leave Green pixels alone". A sequential processor would examine each pixel one at a time and apply the processing instruction. But you can also arrange for data such as this to be an array. The simplest array looks like this: {element 1, element 2, ...} this is called a '1 dimensional array' or a 'vector' A slightly more complicated array would have rows and columns: {element 1, element 2 element 3, element 4} This is called a '2 dimensional' array or 'matrix'. The matrix is fundamental to graphics work.

Array or Vector Processing An array processor (or vector processor) has a number of Arithmetic Logic Units (ALU) that allows all the elements of an array to be processed at the same time. With an array processor, a single instruction is issued by a control unit and that instruction is applied to a number of data sets at the same time. An array processor is a Single Instruction Multiple Data computer or SIMD You will find games consoles and graphics cards making heavy use of array processors to shift those pixels about.

Limitations of array processing This architecture relies on the fact that the data sets are all acting on a single instruction. However, if these data sets somehow rely on each other then you cannot apply parallel processing. For example, if data A has to be processed before data B then you cannot do A and B simultaneously. This dependency is what makes parallel processing difficult to implement. And it is why sequential machines are still extremely common.

Multi-Core processing Moving on from an array processor, where a single instruction acts upon multiple data sets, the next level of parallel processing is to have multiple instructions acting upon multiple data sets. This is achieved by having a number of CPUs being applied to a single problem, with each CPU carrying out only part of the overall problem. A multi-core computer is a 'Multiple Instruction Multiple Data' computer or MIMD

Limitations of multi-core processing This architecture is dependent on being able to cut a problem down into chunks, each chunk can then be processed independently. But not many problems can be broken down in this way and so it remains a less used architecture. Furthermore, the software programmer has to write the code to take advantage of the multi-core CPUs. This is actually quite difficult and even now most applications running on a multi-core CPU such as the Intel 2 Duo will not be making use of both cores most of the time.

1D – Graded exercises Complete the graded exercises on 1D. Extension: Grade A Extension available. Complete all of the base questions before attempting these.

Pre-Reading 1f, 1g, 1h, 1i, 1j 1F, 1H Resources in 1F, G, H, I, J Folder. Make notes on sections 1F, 1H – these will be discussed next lesson before you do your recap activities.