TECHNIQUES OF DC CIRCUIT ANALYSIS: SKEE 1023

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Presentation transcript:

TECHNIQUES OF DC CIRCUIT ANALYSIS: SKEE 1023 Application to operational amplifier circuit SKEE 1023

Operational amplifier: Integrated circuit consisting several transistors and resistors normally used for analog circuit design. Offset null(5) Positive supply Vcc+ (7) Inverting input (2) − Output (6) + Non-inverting input (3) Negative supply Vcc− (4) Offset null(1)

An op-amp can be modeled by a very good voltage amplifier circuit Operational amplifier: Integrated circuit consisting several transistors and resistors normally used for analog circuit design. How can we analyse circuit containing op-amps (consistings of hundreds of transistors and resistors!) using the knowledge that we have so far? The answer is modeling ! An op-amp can be modeled by a very good voltage amplifier circuit Later we’ll see that the analysis is even simplified when we assumed an ideal op-amp.

An op-amp can be modeled by a very good voltage amplifier circuit vo = Avd = A(v2 - v1) vo - output voltage with respect to ground A - open loop gain v1 - inverting input voltage with respect to ground v2 - non-inverting input voltage with respect to ground Avd + − Ro Ri vd v1 v2 v0 An op-amp can be modeled by a very good voltage amplifier circuit

Let’s look at a practical circuit: Unity gain buffer Vcc + − + − + − Vs In drawing op-amp circuits, we normally do not include power supplies + vo − Vcc − +

Let’s look at a practical circuit: Unity gain buffer + − + − Vs In drawing op-amp circuits, we normally do not include power supplies + vo −

Let’s look at a practical circuit: Unity gain buffer Vs = iRi + iRo + Aovin Using KVL, we can write: Vo = iRo + Aovin i Vin = iRi + − + vin − Ro Ri + − Vs + − Aovin + vo − For Ri >> Ro For Ao>>1 Whenever vin 0 , Aovin increases until vin=0 and hence the current cease to flow.

Modeling of an ideal op-amp 1. In previous analysis we have assumed Ri>>Ro In practical op-amps it is true that Ri >> Ro and for ideal op-amp we will assume Ri → and Ro → 0 2. In previous analysis we have assumed Ao>> 1 In practical op-amps it is true that Ao>> 1 and for ideal op-amp we will assume Ao → As a result of 1 and 2, when analysing an op-amp circuit with feedback, we will assume that: i. i1 = 0, and i2 = 0 ii. v2 –v1 = 0

Let’s look back at the buffer circuit using ideal op-amp Since vo is tied to v1 and in ideal op-amp v1=v2, it is obvious that vo = Vs (as we have seen before) + − Vs v2 v1 vo

Eg.2 (PP 5.2) Find the closed-loop gain vo/vs. Determine current i when vs = 2V

Inverting Amplifier Since i1 = i2, and v1 = v2 = 0

Non-inverting Amplifier Since i1 = i2, and v1 = v2 = vi

Summing Amplifier KCL at node a gives: i = i1 + i2 + i3 And, since v+ = v- = 0

Difference Amplifier Using voltage division rule, With va = vb, applying KCL at the inverting input,

Difference Amplifier It can be shown that: If