FPGA IMPLEMENTATION OF TCAM Under the guidance of Dr. Hraziia Presented By Malvika ( ) Department of Electronics and Communication Engineering National Institute of Technology Nagaland 7-Sep-171Project I | Assessment I

Outline Objective Introduction Motivation Block diagram Literature review Future work References 7-Sep-172Project I | Assessment I

Objective Designing and implementation of TCAM using both Distributed RAM and Block RAM Analysis of which one (Dist. RAM/ BRAM) will be more efficient. Implementation of variable length word TCAM. 7-Sep-173Project I | Assessment I

Motivation We are already having several search algorithms to search data but if there are so many bits to search then the whole system goes slow and also with binary cam we can search only two bits so ternary cam will overcome this problem. Variable length word can be implemented using TCAM. 7-Sep-174Project I | Assessment I

CAM: Introduction Binary CAM vs. RAM Data Out 4 Address In Data In 3 Address Out Sep-175Project I | Assessment I

CAM: Introduction Ternary CAM (TCAM) 00X X X01010 XXX01101 Input Keyword XXXXX1115 XXXX11014 XXX XX X Match Input Keyword 7-Sep-176Project I | Assessment I

Block Diagram 7-Sep-177Project I | Assessment I

Literature Review(1/2) 7-Sep-178Project I | Assessment I Reference [1] Source: Weirong Jiang, 2013

Literature Review (2/2) Reference [2] 7-Sep-179 Source: Z. Ullah et al., 2012 Project I | Assessment I

Future Work Present the design and implementation of TCAM using both Distributed RAM and BRAM. Present the implementation of variable length word TCAM. 7-Sep-1710Project I | Assessment I

References [ 1] Weirong Jiang, Xilinx Research Labs San Jose, CA, USA. Scalable Ternary Content Addressable Memory Implementation Using FPGAs. Proceedings of the ninth ACM/IEEE, Press Piscataway, NJ, USA, 2013 symposium on Architectures for networking and communications [2] Z. Ullah, M. K. Jaiswal, Y. C. Chan and R. C. C. Cheung. FPGA Implementation of SRAM-based Ternary Content Addressable Memory. In IPDPSW '12: Proceedings of the IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum, Sep-1711Project I | Assessment I

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