Reflector Design for Orthogonal Frequency (OFC) Coded Devices D.C. Malocha, D. Puccio, and N. Lobo School of Electrical Engineering & Computer Science University of Central Florida Orlando, Fl Acknowledgements: Funding is provided through the NASA STTR grants with industry partners of MSA and ASRD, and through the NASA Graduate Student Research Program.

Schematic of OFC SAW ID Tag Background: OFC Bit – 7chips/bit Chip length Bit Length

Approach Study a methodology to optimize reflective structures for OFC devices –Minimize device insertion loss –Find optimum values for bit length, chip length, and strip reflectivity as a function of device fractional bandwidth –Maintain processing gain –Minimize ISI effects

Boundary Conditions for Analysis Assume only a single in-line grating analysis. Assumes no weighting within each reflective region which composes a chip. First order assumptions are made to understand the phenomenon and then verified by COM models and simulation. Multiple parallel tracks can be approached in a similar manner.

SAW OFC Reflector Coding Ideal OFC code using a SAW reflective structure assumes that the ideal chip can be accurately reproduced by a reflector –Chip frequency response: Sin(x)/x –Chip time response: – Uniform amplitude of chips for maximum coding, processing gain (PG) and correlation output

Intra-chip & Inter-chip Reflector Considerations Chip reflector uniformity Processing gain Coding diversity Orthogonality of chips Frequency & time domain distortion Intersymbol interference (ISI)

OFC Reflector Bank Uniformity f c =chip frequency determined by orthogonality As f c increases, N c increases and chip reflectivity increases

Response of Reflector Test Structure Under proper conditions, a SAW reflector looks similar to a Sampling function in frequency and a Rect function in time. Reflectivity is a function of the substrate and reflector material, reflector film thickness, substrate coupling coefficient and line-to-width ratio. The reflector width is approximately the chip length. How approximate is it???

Simulation of a reflector grating frequency response for 1% reflectivity per strip, and 4 different grating lengths. N g equals the number of reflective strips in each grating. For Ng * r small, reflector response looks like sin(x)/x

Plot of magnitude of reflectivity versus the product of the number of strips and reflectivity per strip (Ng. r). For small reflector loss, chip reflectivity, Ng.r, should be large but for reasonable sin(x)/x frequency response, Ng. r product should definitely be less than 2.

OFC Adjacent Frequency Reflection OFC yields reduced reflections between reflectors compared to single frequency PN due to orthogonality Non-synchronous orthogonal frequencies are partially reflected The closer the adjacent frequency chips the greater the partial reflection Must understand non-synchronous reflectivity for all chips

Adjacent Frequency Reflection Assume an RF burst near f o as interrogation signal Very small reflection of incident adjacent frequency RF burst from weak reflector Large adjacent frequency reflection from strong reflector Transmission through the reflector bank can be compromised if chip reflectivity is too large which causes energy rolloff for trailing chips. Small Reflectivity Large Reflectivity

Frequency Transmission vs Reflectivity as a Function of Frequency Offset COM simulations used to determine non-synchronous reflector transmission coefficient Analysis performed for reflector center frequencies 1,2,3 orthogonal frequencies higher and lower than incident wave f SAW is the synchronous reflector of interest is a prior asynchronous reflector in bank For 90% transmission, r * Ng<2

Adjacent Frequency Reflector Transmission Example Independent of the OFC frequency code sequence, the sum of the adjacent frequency interactions is always equal to N f -1, but the interactions for a given frequency is code dependent.

Total Reflected OFC Power - Simple Model –P tot = total output power –T adj =adjacent center frequency transmission – R o =chip reflectivity –r= electrode reflectivity –N g = # of reflector chip electrodes –N f = # of frequencies Equations defined to relate several OFC reflector bank parameters, (approximate and empirically derived)

Example Reflected Power Prediction 10% bandwidth 2% electrode reflectivity No repeated frequencies Predictions compared with COM simulations Large variations caused by multi- reflection interference Approximate analysis and COM model agree well for N f <10. Optimum reflected power for 10<N f <15.

Optimal Reflection Coefficient Reflected power for 5% and 10% fractional bandwidths Optimal empirically derived relationship for # of frequencies (N f ), strip reflectivity (r) and %BW bit : Total reflected power is maximized for R 0 ~ 80% Colors represent reflectivity, white is maximum reflected power

Reflector Test Structure Time Response How approximate is the time domain reflector compared to a Rect function???

Simulation of a SAW grating time response for 1% reflectivity and 4 different grating lengths. Time scale is normalized to reflect the number of wavelengths at center frequency As N g * r increases: 1. Impulse response length of reflector increases beyond desired chip -ISI 2. Energy leakage beyond desired chip increases- energy loss Ng*r=1 appears to be maximum for acceptable ISI

Chip Correlation with Synchronous Interrogator Pulse Correlation is greater than ideal, IR length is near ideal and sidelobes are low. Correlation is greater but sidelobes apparent due to intra-chip- reflections

Chip Correlation with Adjacent Frequency Asynchronous Interrogator Pulse Near ideal response. Cross correlation shows null at chip center, as expected due to OFC properties. Cross correlation shows reduced null at chip center, and trailing correlation sidelobe distortion.

Measured Device Example f o = 250 MHz %BW=28%; BW=69 MHz YZ LiNbO 3, k 2 =.046, r~3.4% (# frequencies) = (# chips) =7 # of reflectors at f o = 24 Ng*r ~.72 Chip reflector loss~4dB

COM Simulation versus Experimental Results – Time Domain Reflections COM Predictions Experimental Measurement Dual delay OFC device having two reflector banks and 7 chips/bank For Ng*r ~.72, chips are clearly defined, ISI is minimal, predictions and measurements agree well

COM Simulation versus Experimental Results - Correlation Dual delay OFC device having two reflector banks and 7 chips/bank For Ng*r ~.72, ideal, COM predictions, and experimentally measured autocorrelation results agree well

General Results and Conclusions Various OFC chip criteria were investigated to provide guidance in choosing optimal design criteria. The ISI and pulse correlation distortion appear to be a limiting or controlling factor for maximizing the chip reflectivity and suggests N g *r<1. For N g *r=1, chip reflector loss is approximately 2.5 dB. Based on reflective power predictions and simulations, the largest number of chip frequencies should be between 10 and 15, with the precise number of frequencies dependent on the bit fractional bandwidth and strip reflectivity.