Analog Integrated Circuits Number : Name: Jo-Yongmin

Contents 1.LDO - Introduce - Block Diagram - Simulation - Performance Comparison - Layout - Reference

Introduce A low-dropout or LDO regulator is a DC linear voltage regulator which can operate with a very small input– output differential voltage. The advantages of a low dropout voltage include a lower minimum operating voltage, higher efficiency operation and lower heat dissipation. What is the LDO? LDO Vout Vin Vout Vin V

LDO Block Diagram The main components are a power FET and a differential amplifier (error amplifier). One input of the differential amplifier monitors the fraction of the output determined by the resistor ratio of R1 and R2. The second input to the differential amplifier is from a stable voltage reference (bandgap reference). If the output voltage rises too high relative to the reference voltage, the drive to the power FET changes to maintain a constant output voltage. R1 R2

LDO circuit

LDO simulation - Drop-out & Vout mV 1.81 V Drop-out85.81 mV Vout1.81 V

8.96 mA 202 Ω 8.96mA Rout202Ω

LDO simulation - Line regulation Line 2~3V mV/V1.76 %0.176

LDO simulation - load regulation Load 0~5mA mV/mA0.216 %0.0595

LDO simulation - Gain, PM Gain95.12 dB PM68.14˚ dB

LDO simulation - Current Consumption

LDO simulation - Power Efficient ~250Ω 7.24~8.04mA 1.81 Maximum Power Efficient 222~250Ω

LDO Performance Comparison Spec. [1][2][3][4] This work Vout 2.24V1.6V2V1.75V 1.81V Iomax -10mA300mA Drop-out 250mV200mV120mV200mV 85.81mV Line regulation load regulation Gain -73~77dB-68.2dB 95.12dB PM Current Consumption -20mA130uA- 3.76uA Current Efficient % Maximum Power Efficient ----

LDO Layout R1=1.155MΩ R2=840KΩ Error AMP Pass Tr 260um 140um

Reference [1] 권보민, 정진우, 김지만, 박용수, 송한정 “ 저전력 용량성 센서 인터 페이스를 위한 저잡음 CMOS LDO 레귤레이터 설계 ” [KISTI 연계 ] 센 서학회지 19(1), 25-30, 2010 [2] 심상미, 박준규, 강현철, 유종근 “ 고성능 CMOS LDO 레귤레이터 설계 ” 대한전기학회, 대한전기학회 학술대회 논문집, , (2 pages) [3] Jungsu Choi, Jungeui Park, Wooju Jeong, Junsang Lee, Seok Lee, Jayang Yoon, Jaehoon Kim, Joongho Choi “Design of LDO Linear Regulator with Ultra Low-Output Impedance Buffer” 대한전자 공학회, 대한전자공학회 ISOCC, , (4 pages) [4] 최정수, 장기창, 최중호 “ 효율적 버퍼 주파수 보상을 통한 LDO 선 형 레귤레이터 ” 대한전자공학회, 전자공학회논문지 -SD 48(11), , (7 pages)

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