Variable-Time-Frame Gate-Level Abstraction Alan Mishchenko Niklas Een Robert Brayton Alan Mishchenko Niklas Een Robert Brayton UC Berkeley UC Berkeley Jason Baumgartner Hari Mony Pradeep Nalla IBM IBM

2 Overview Introduction Introduction Motivation Motivation Algorithm Algorithm Experimental results Experimental results Conclusion Conclusion

Abstraction Finding a subset of logic gates of the miter, large enough to complete the proof

Taxonomy of Abstraction Methods Automatic vs. manual SAT-based vs. BDD-based vs. other Proof-based vs. CEX-based vs. hybrid Flop-level vs. gate-level Fixed time-frame vs. variable time-frame

The Proposed Approach is… Automatic SAT-based Hybrid Gate-level Variable time-frame

6 Previous Work Flop-level abstraction Flop-level abstraction N. Een, A. Mishchenko, and N. Amla, "A single-instance incremental SAT formulation of proof- and counterexample- based abstraction", Proc. FMCAD'10. N. Een, A. Mishchenko, and N. Amla, "A single-instance incremental SAT formulation of proof- and counterexample- based abstraction", Proc. FMCAD'10. Gate-level abstraction Gate-level abstraction J. Baumgartner and H. Mony, “Maximal Input Reduction of Sequential Netlists via Synergistic Reparameterization and Localization Strategies”. Proc. CHARME’05, pp J. Baumgartner and H. Mony, “Maximal Input Reduction of Sequential Netlists via Synergistic Reparameterization and Localization Strategies”. Proc. CHARME’05, pp

7 Motivation Flop-level abstraction is too crude Flop-level abstraction is too crude Adds too much logic to the abstracted model Adds too much logic to the abstracted model (but refinement with external CEXes is easier…) (but refinement with external CEXes is easier…) Gate-level abstraction is also too crude Gate-level abstraction is also too crude Includes all abstracted logic in each time-frame Includes all abstracted logic in each time-frame Solution: “Variable-time-frame” gate-level abstraction Solution: “Variable-time-frame” gate-level abstraction Adds logic to each time-frames on demand (a gate may be added in one time-frame but not in others) Adds logic to each time-frames on demand (a gate may be added in one time-frame but not in others)

Improved BMC In the classical BMC, in each timeframe, we add the complete “tent” (bounded cone-of-influence) experiments show that a small fraction of this logic (typically, 5-20%) is enough to prove the problem UNSAT This motivates a smarter approach add logic on-demand This may reduce the SAT solver size substantially, resulting in a faster and more scalable BMC Frame 0 Frame 1 Frame 2 Frame 3

Deciding What Logic to Add It is enough to add only logic in the UNSAT cores But we do not know what is the next UNSAT core We use previous cores: Lift K previous UNSAT cores to the given level If the problem is still SAT, refine it by selectively adding gates to time-frames Use the rollback feature of SAT solver to include the minimal amount of logic UNSAT core of Frame 0 UNSAT core of Frame 1 UNSAT core of Frame 2 UNSAT core of Frame 3

Improved Gate-Level Abstraction Use the variable-time-frame approach to BMC Then, build a gate-level abstraction, by taking the union of all gates, present in any time-frame

Improved Interpolation Interpolation-based model checking can benefit from the variable-time-frame approach to BMC When the transition relation is unrolled, there is no need to add all logic in the COI of the property The proposed approach can be used to decide what logic to include As a result The SAT problem becomes simpler The intermediate interpolants becomes smaller

12 Experimental Results abc 01> read ex1.aig; ps ex1: i/o = 1570/ 1 lat = 3113 and = lev = 31 abc 02> pdr Invariant F[29] : 5033 clauses with 734 flops (out of 3113) Property proved. Time = sec abc 03> read ex1.aig; ps ex1: i/o = 1570/ 1 lat = 3113 and = lev = 31 abc 04> &vta -S 5 -P 2 -F 45 -v Solver UNSAT = 1.49 sec ( %) Solver SAT = 2.57 sec ( %) Refinement = 5.37 sec ( %) Other = 0.86 sec ( 8.37 %) TOTAL = sec ( %) SAT vars = Clauses = Confs = Used 0.75 Mb for proof-logging. abc 05> &vta_gla; &ps; &gla_derive; &put; pdr Gate-level abstraction: PI = 1 PPI = 66 FF = 143 (4.59 %) AND = 505 (3.02 %) Invariant F[22] : 545 clauses with 114 flops (out of 143) Property proved. Time = 3.92 sec

abc 02> &r ex1.aig; &ps abc 02> &vta -S 5 -P 2 -F 45 -v Frame Confl One Cex All 0 : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : SAT completed 45 frames. Time = sec Solver UNSAT = 1.49 sec ( %) Solver SAT = 2.57 sec ( %) Refinement = 5.37 sec ( %) Other = 0.86 sec ( 8.37 %) TOTAL = sec ( %) SAT vars = Clauses = Confs = Used 0.75 Mb for proof-logging.

ABC’s &vta vs. IBM’s SixthSense Tried two SixthSense configurations: Config2: automatic, SAT-based, counter-example- based, gate-level, fixed time-frame Config5: automatic, SAT-based, hybrid, gate-level, fixed time-frame Used a suite of 58 model checking benchmarks submitted to HWMCC’11 by IBM Result 1: Config5 produces abstractions that are 20% (16%) smaller in terms of gates (flops) Result 2: Config2 completed more timeframes in 5 minutes for 75% of benchmarks

15 Conclusions Reviewed abstraction algorithms Reviewed abstraction algorithms Motivated an improvement to BMC Motivated an improvement to BMC Connected it with gate-level abstraction Connected it with gate-level abstraction Showed preliminary experimental results Showed preliminary experimental results

Future Work Using coarser objects to abstract, refine, and derive CNF Adopting min-cut heuristics to decide what gates to add to the abstraction Performing the initialized unrolling with proof-logging