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TI Information – Selective Disclosure Negative input voltage Lab and Applications Analysis Ronald Michallick – SLL SC Applications 1.

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Presentation on theme: "TI Information – Selective Disclosure Negative input voltage Lab and Applications Analysis Ronald Michallick – SLL SC Applications 1."— Presentation transcript:

1 TI Information – Selective Disclosure Negative input voltage Lab and Applications Analysis Ronald Michallick – SLL SC Applications 1

2 TI Information – Selective Disclosure Why are negative voltages forbidden? Many bi-polar products uses a junction isolated process. In a JI process all components are touching each other via one or more P and N doped silicon junctions. The P- substrate is connected to ground pin and runs throughout the die on the bottom and separates all N- tanks that hold one or more compatible components. This isolation works well provided all the N- tanks remain positive or zero relative to the common P- substrate. The input pins connect directly to separate N- tanks like all lateral PNP transistors. The negative tank voltage forward biases to substrate causes input current flow to ground. 2

3 TI Information – Selective Disclosure Why does negative input current cause phase reversal? The electrons injected from N- tank to P- substrate will be minority carriers looking for holes in the P- substrate to recombine becoming ground current. The P- doesn't have a lot of holes (that's the – after the P), many electrons will be attracted the other nearby tanks, especially ones at high voltage although even 0V tanks will look attractive. This process is NPN transistor action. Every tank that collects these injected electrons (NPN collector) will be affected by this current flow. Think of the parasitic NPN as short circuits in the die that cause temporary malfunctions. Phase reversal is a malfunction. 3


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