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Chapter 3 Parallel Ports, Power Supply and the Clock Oscillator The aims of this chapter are to introduce: Why we need parallel input/output; How simple.

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Presentation on theme: "Chapter 3 Parallel Ports, Power Supply and the Clock Oscillator The aims of this chapter are to introduce: Why we need parallel input/output; How simple."— Presentation transcript:

1 Chapter 3 Parallel Ports, Power Supply and the Clock Oscillator The aims of this chapter are to introduce: Why we need parallel input/output; How simple parallel i/o logic circuits can be developed; How external devices can be connected to the parallel port; The parallel i/o available on the PIC 16F84A; The essential features of power supply and clock oscillator; The Microchip approach to power supply and oscillator; The hardware design of the electronic ping-pong game. Designing Embedded Systems with PIC Microcontrollers: Principles and Applications 2 nd Edition. Tim Wilmshurst Instructors using Designing Embedded Systems with PIC Microcontrollers are welcome to use or change these slides as they see fit. Feedback, to t.j.wilmshurst@derby.ac.uk, is welcomed.t.j.wilmshurst@derby.ac.uk The copyright to all diagrams is held by Microchip Technology, or T. Wilmshurst, unless otherwise stated

2 Almost any embedded system needs to transfer digital data between its CPU and the outside world. This transfer falls into a number of categories, which can be summarised as: Direct user interface, including switches, keypads, light emitting diodes (leds) and displays; Input measurement information, from external sensors, possibly being acquired through an analog to digital converter; Output control information, for example to motors or other actuators; Bulk data transfer to or from other systems or sub-systems, moving in serial or parallel form, for example sending serial data to an external memory. How can we provide the required interface between the microcontroller core and the outside world? More precisely, how do we get the data onto or off the data bus at the right moment? Why Digital Input/Output?

3 Parallel Input/Output 2 We could apply a circuit like this for output. Here a pulse on the Port Select line captures data on the bus at that instant, and transfers it to the external pin. Data Bus External Pin Port Select QD Two lines of External Pin QD Read/Write Flip-flop latches data bus value onto external pin, when memory location is selected, AND Write is active high whenever port address is selected

4 Parallel Input/Output 2 Data Bus External Pin Port Select Two lines of buffer transfers logic value on external pin onto data bus line, when memory location is selected, AND Read is active External Pin Read/Write Or we could apply a circuit like this for input. Here a pulse on the Port Select line transfers data on the external pin at that instant to the data bus.

5 A Bi-Directional Port Pin Driver Circuit Or, we could combine both circuits into one multi- function circuit, like this. You don’t need to grasp all the detail of this circuit, although it’s neat if you can. There is now an extra flip- flop, labelled “Direction”. The state of this decides in which direction data will flow. The two flip-flops shown can each form one bit in an SFR, which can be controlled from the CPU. A group of these bits, each driven by a circuit like this, is called a “port” D Q D Q "Direction" "Data" I/O Pin Read/Write Port Select Direction Select Data Bus (bit n of an 8-bit port) (bit n) Output Buffer Input Buffer Alternate Input Function "Data" SFR "Direction" SFR Read Port Write Port Write DDR buffer, enabled when pin is output determines whether port bit is input or output 8 of these flip-flops form the "Data Direction" SFR 8 of these the "Data" SFR holds bit output value flip-flops form D Q D Q "Direction" "Data" I/O Pin Read/Write Port Select Direction Select Data Bus (bit n of an 8-bit port) (bit n) Output Buffer Input Buffer Alternate Input Function "Data" SFR "Direction" SFR Read Port Write Port Write DDR buffer, enabled when pin is output determines whether port bit is input or output 8 of these flip-flops form the "Data Direction" SFR 8 of these the "Data" SFR holds bit output value - flip-flops form

6 Modelling a Logic Gate Output a) Generalised Model b) Model of CMOS Logic Gate Output R R S(high) S(low) V L V LH V LL R R S(high) S(low) V L V S switch is in this position when output is at Logic 1 switch is in this position when output is at Logic 0 internal Logic 1 voltage is the supply voltage internal Logic 0 voltage is ground To connect the port bit output, we need an understanding of how its internal circuit behaves electrically. We can model it as shown.

7 Simple Digital Interfacing – connecting to switches Connecting switches to logic inputs. (a) SPDT connection. (b) SPST with pull-up resistor. (c) SPST with pull-down resistor

8 Light Emitting Diodes (leds) High Efficiency Red Yellow http://www.kingbright.com.tw/

9 a) Gate Output Sourcing b) Gate Output Sinking Current to LED Current from LED Driving LEDs from Logic Gates (and hence Port Bit Outputs) Data for the 16F84A (when powered from 5V) shows an output resistances of approximately 130  when at logic high, and 36  when at logic 0. I R D I R V D D V S V D current flows out of the gate and lights led when output is at logic 1 current flows into gate and lights led when output is at logic 0

10 SFRs for the 16F84A Parallel Ports The Port SFRs can be seen in the memory map, the detail repeated here. SFR named PORTX holds the input/output data for the port, ie it holds all the “Data Latch” bits for that port. The SFR named TRISX holds all the “TRIS Latch” bits for that port. The bits can be set independently, so one can be input while another output. They cannot be both at the same time. Ports A and B can easily be found on the pin connection diagram. Port A is only 5 bits, while Port B is 8. Note that some pins have several functions, as indicated on the diagram.

11 The 16F84A pins RB3:RB0 Holds output data Value held determines data direction Output buffer 0 on this line enables output buffer From Option Register Decoded address lines

12 Port Input Characteristics When designing with microcontroller digital I/O one needs to have an understanding of their electrical characteristics. 16F84A Input Characteristics The input of a logic gate or port pin requires the voltage to be below a certain maximum in order to be recognised as a logic 0, or above a certain minimum to be recognised as a logic 1. Minimum Input High Voltage, V IH 2.4V(TTL buffer inputs) Maximum Input Low Voltage, V IL 0.8V(TTL buffer inputs) Input Leakage Current, I IL +1  A PIC 16F84A Port Input Characteristics (5V power supply)

13 a) V OH vs. I OH (V DD = 3V, -40°C TO 125°C) 16F84A Port Output Characteristics, Logic High

14 b) V OL vs. I OL (V DD = 3V, -40°C TO 125°C) 16F84A Port Output Characteristics, Logic Low

15 The choice of microcontroller clock source determines some of its fundamental operating characteristics. While “faster is better” in terms of operating speed and programming execution, faster is definitely worse in terms of power consumption. All timed elements within the microcontroller almost invariably depend on the clock characteristics. If stable and accurate timing is required, then the clock oscillator must be stable and accurate. The clock source must therefore be chosen with care. Oscillators can be based on resistor-capacitor circuits, quartz crystal or ceramic. Read up about the relative advantages. The Microcontroller Oscillator R-C Oscillator CircuitsThe Quartz Crystal

16 The 16F84A can be configured to operate in four different oscillator modes, using R-C, crystal or ceramic oscillators. It can also accept an external clock source. The user selects which mode is to be used by setting bits in the Configuration Word. XT – Crystal The standard crystal configuration, intended for crystals or ceramics in the range 1MHz to 4MHz. HS – High Speed A higher drive version of the XT configuration, for higher frequency crystals and ceramic resonators. Intended for frequencies in the region of 4MHz or greater. It leads to the highest current consumption of all the oscillator modes. LP – Low Power Intended for low frequency crystal applications, and gives the lowest power consumption possible. Will however operate at any frequency below around 200kHz. RC - Resistor-Capacitor Requires connection of an external resistor and capacitor. The lowest cost way of getting an oscillator, but should not be used when any timing accuracy is required. The 16F84A Oscillator Modes

17 b) Resistor-Capacitor c) Externally Supplied Clock The 16F84A Oscillator Modes a) Crystal or Ceramic, HS, XT, or LPThe Oscillator Pins

18 The 16F84A R- C Oscillator Recommended component values for crystal and ceramic resonator oscillators can be found in the published data. Values for R-C oscillator are given graphically, with example below.

19 The 16F84A Power Supply The power supply connections are easily seen on the pin connection diagram. It is easy to get these mixed up – don’t!

20 The Need for Supply Decoupling Current is consumed on every clock transition I V s Internal Clock V min Supply voltage drops below minimum value on each current pulse Microcontroller V s I PCB Tracks add decoupling capacitor here Series inductance and resistance in supply line separates circuit from (ideal) voltage source

21 End of Lecture Note The Hardware Design of the Electronic Pingpong


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