1. L19 26Mar021 Semiconductor Device Modeling and Characterization EE5342, Lecture 19 -Sp 2002 Professor Ronald L. Carter ronc@uta.edu http://www.uta.edu/ronc/

2. L19 26Mar022 Ideal 2-terminal MOS capacitor/diode x -x ox 0 SiO 2 silicon substrate V gate V sub conducting gate, area = LW t sub 0 y L

3. L19 26Mar023 Band models (approx. scale) EoEo EcEc EvEv q  ox ~ 0.95 eV metalsilicon dioxidep-type s/c q  m = 4.1 eV for Al EoEo E Fm E Fp EoEo EcEc EvEv E Fi q  s,p q  Si = 4.05eV E g,ox ~ 8 eV

4. L19 26Mar024 Flat band condition (approx. scale) E c,Ox EvEv AlSiO 2 p-Si q(  m -  ox )= 3.15 eV E Fm E Fp EcEc EvEv E Fi q(  ox -  Si )=3.1eV E g,ox ~8eV q  fp = 3.95eV

5. L19 26Mar025 Equivalent circuit for Flat-Band Surface effect analogous to the extr Debye length = L D,extr = [  V t /(qN a )] 1/2 Debye cap, C’ D,extr =  Si /L D,extr Oxide cap, C’ Ox =  Ox /x Ox Net C is the series comb C’ Ox C’ D,extr

6. L19 26Mar026 Accumulation for V gate < V FB SiO 2 p-type Si V gate < V FB V sub = 0 E Ox,x <0 x -x ox 0 t sub holes

7. L19 26Mar027 Accumulation p-Si, V gs < V FB Fig 10.4a*

8. L19 26Mar028 Equivalent circuit for accumulation Accum depth analogous to the accum Debye length = L D,acc = [  V t /(qp s )] 1/2 Accum cap, C’ acc =  Si /L D,acc Oxide cap, C’ Ox =  Ox /x Ox Net C is the series comb C’ Ox C’ acc

9. L19 26Mar029 Depletion for p-Si, V gate > V FB SiO 2 p-type Si V gate > V FB V sub = 0 E Ox,x > 0 x -x ox 0 t sub Acceptors Depl Reg

10. L19 26Mar0210 Depletion for p-Si, V gate > V FB Fig 10.4b*

11. L19 26Mar0211 Equivalent circuit for depletion Depl depth given by the usual formula = x depl = [2  Si (V bb )/(qN a )] 1/2 Depl cap, C’ depl =  Si /x depl Oxide cap, C’ Ox =  Ox /x Ox Net C is the series comb C’ Ox C’ depl

12. L19 26Mar0212 Inversion for p-Si V gate >V Th >V FB V gate > V FB V sub = 0 E Ox,x > 0 Acceptors Depl Reg e - e - e - e - e -

13. L19 26Mar0213 Inversion for p-Si V gate >V Th >V FB Fig 10.5*

14. L19 26Mar0214 Approximation concept “Onset of Strong Inv” OSI = Onset of Strong Inversion occurs when n s = N a = p po and V G = V Th Assume n s = 0 for V G < V Th Assume x depl = x d,max for V G = V Th and it doesn’t increase for V G > V Th C d,min =  Si /x d,max for V G > V Th Assume n s > 0 for V G > V Th

15. L19 26Mar0215 MOS Bands at OSI p-substr = n-channel Fig 10.9*

16. L19 26Mar0216 References * Semiconductor Physics & Devices, by Donald A. Neamen, Irwin, Chicago, 1997.