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Addressing Modes. Register Addressing Immediate Addressing Base Addressing Indexed Addressing PC-Relative Addressing.

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Presentation on theme: "Addressing Modes. Register Addressing Immediate Addressing Base Addressing Indexed Addressing PC-Relative Addressing."— Presentation transcript:

1 Addressing Modes

2 Register Addressing Immediate Addressing Base Addressing Indexed Addressing PC-Relative Addressing

3 Immediate Addressing One operand within instruction is a constant Does not require extra memory to fetch value Operand limited to 16 bits

4 Register Addressing Direct addressing –No delay due to memory access –Access by register number not memory address When Op-code is 0 or 1, operation determined by rt or function fields. rs, rd, and rt are actual register numbers. Function is opcode for add. See figure 6.3 on page 61 for list of opcodes.

5 Base Addressing Base Addressing is considered indirect addressing. Address in Register points to memory location where value is stored.

6 Records and Base Addressing Records A collection of data treated as one unit: struct student char name[80] char ID[20] float GPA char program[35] end struct

7 Loading a value stored in a Record Begin with base address of student Record –Let $t0 point to base address of student Access of values within Record student always begins with base address –Records accessed by adding a value to base address: –lw $t1, 4($t0) –This instruction loads the value located one word away from the base address. –lw $t1, ($t0) –This instruction has zero offset (length.a program)

8 Indexed Addressing Indexed addressing is a mode of addressing very useful for arrays. In the following snippet of code, consider “intArray” first: li $t1,2 # load index value 2 in $t1 lb $v0, intArray($t1) # $v0 = intArray[$t1]... intArray:.byte 6,34,12,-32, 90 # index zero is first Think of intArray as an array of five bytes. Then the lb instruction loads the element of the array at index 2 (the byte that contains 12) into $v0.

9 How the Assembler translates the code Basic instructions are used to add the index value in $t1 to the address symbolized by intArray. Here is what the assembler generates for the above code: ori $t1,$0,2 # index 2 lui $at,4097 # $at register gets address “intArray" addu $at,$at,$t1# add index to $at lb $v0,0($at) # $v0 = intArray[$t1] intArray:.byte 6,34,12,-32, 90 The assembler generates code that uses register $at to calculate the address of the correct byte. Then, using that address, the byte is loaded into $v0.

10 What Assembler is doing ori $t1,$0,2: logical OR: $t1 <- $0 OR 2 lui $at,4097: Load lower halfword of 4097 into upper halfword of $at. Set lower bits of $at to zero. addu $at,$at,$t1: Add 2 to address at $at to get address of value at index 2 of array. lb $v0,0($at): Using address calculated in $at, get byte located there and put it in $v0.

11 Four Levels

12 Indexes start at Zero To move through an array start the index at zero and increment it by 1 to move to the next element. Here is a program snippet that adds up all the bytes in the array: li $v1,0# zero the sum li $t1,0 # initialize index to 0 li $t2,0 # initialize loop counter for: beq $t2,5,endfor # for ( i=0; i < 5 ;i++ ) lb $v0,intArray($t1) # load byte at index in $v0 addu $v1,$v1,$v0 # sum = sum+intArray[i] addi $t1,$t1,1 # increment index addi $t2,$t2,1 # increment counter b for endfor:... intArray:.byte 6,34,12,-32, 90

13 Integer Array This program adds up the integers in an array of full words (32 bits). Notice the lw command instead of lb in previous program. The logic is the same as before. It is not too distant from what a "C" for loop might be compiled into..globl main main: li $v1,0 # zero the sum li $t1,0 # init index to 0 li $t2,0 # init loop counter for: beq $t2,5,endfor # for ( i=0; i < 5 ;i++ ) lw $v0,array($t1)# load element at index $t1 into $v0 addu $v1,$v1,$v0 # sum = sum+array[i] addi $t1,$t1,4 # increment index addi $t2,$t2,1 # increment counter b for endfor: li $v0,10 # exit syscall.data array:.word 1,2,3,-5,1 NOTE: If you copy it to a file and run it with SPIM make sure that pseudo instructions are allowed and that delayed load and delayed branches are turned off.


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