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EMCal Sensor Status (* M. Breidenbach*,

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Presentation on theme: "EMCal Sensor Status (* M. Breidenbach*,"— Presentation transcript:

1 EMCal Sensor Status (* mib@slac.stanford.edu). M. Breidenbach*,

2 SiD Workshop 2015 Si sensors 6 inch wafers 1024 13 mm 2 pixels KPiX readout is bump- bonded directly to sensor KPiX ASIC and sample trace 2

3 SiD Workshop 2015 Monster behavior increases with more hit pixels (multi- electrons) 3

4 SiD Workshop 2015 Major Lessons (so far) Bump bonding to sensors with Al pads can be very difficult… Consider sensor foundry build final pad stack. Don’t dice the sensors until bonding issues are fully controlled. EMCal can have huge number of pixels hit simultaneously, causing synchronous disturbances as pixels reset…Problem understood, small changes in KPiX design. Sensors with ROC’s can have issues with parasitic couplings… 4

5 SiD Workshop 2015 In present design, metal 2 traces from pixels to pad array run over other pixels: parasitic capacitances cause crosstalk. New scheme has “same” metal 2 traces, but a fixed potential metal 1 trace shields the signal traces from the pixels. Sensor Traces 5

6 SiD Workshop 2015 connection of implant to metal 2 trace to pad. Shield trace running under Metal 2 signal trace. All shield traces are tied together, and brought to a metal 2 pad. Probably will be tested in next sensor prototype. Metal 1 6

7 SiD Workshop 2015 7 New Sensors will have: Thicker oxide layer - Should fix wire bonding problem - Lower capacitance Under Bump Metallization - Solve horrible post processing UBM New Metal 1 Layout (as sketched) - Reduce crosstalk - Reduce capacitance Complete at Hama, now being shipped to SLAC Decided to do 2 nd round with Hamamatsu

8 SiD Workshop 2015 8 First measurements from Hama About 16 pixels shorted, appears to be mask error. Will proceed with evaluation

9 SiD Workshop 2015 Multiplicity There have been indications that forward multiplicity might be more than 4 buffer KPiX could handle. - Long known that BeamCal required BEAN chip, which digitizes every pulse. Study only has Guinea Pig pairs so far; Bhabhas must be added before concluding anything! Have generated one train’s worth of pairs resulting from beam-beam interactions at 500GeV - 1325 bunches ( Represent nominal ILC luminosity, “high- luminosity” running would be x2) 9 Study KPiX to see if more buffers might be added, preserving architecture. MAP’s?

10 SiD Workshop 2015 The kPixM family: 10 kPixM-TrkkPixM-Cal Pixel size50x500 µm 2 1000x1000 µm 2 Array200x2400100x94 Full Size Stitched 5x5 reticles Max. Signal1fC1pC Effective ENC<200e - <1000e - FilteringLP + CDS S/N>20>4 In pix mem. depth1 bucket16 buckets ADC resolution12 bits DC Power cons.~ 20µW/pix Power pulsingYes General characteristics Amplitude and Timing extraction on N bunches per train in each pixel (N=1 for the tracker, N=16 for the calorimeter) Synchronous (time-variant operation) Ultra-large Area beyond reticle size (stitching) System-on-chip approach (limited IO required Platform based design Sparse readout Power Pulsing Calibration per pixel Temperature monitoring and tracking Auxiliary Monitoring

11 SiD Workshop 2015 kPixM-Cal pixel architecture 11

12 SiD Workshop 2015 Summary and Conclusions Sensors with KPiX remain the SiD baseline Over the past decade, SiD has developed a first generation of sensors, readout with KPiX, leading to a SLAC beamtest of the calorimeter sensors. This is the baseline approach. Monolithic technologies have the potential for providing higher granularity, thinner, intelligent detectors at lower overall cost. SLAC is investigating the potential of a Monolithic version of kPix (kPixM) class of devices both for the tracker and the E-calorimeter: - Amplitude and timing extraction - Synchronous operation with non overlapping phases - Sparse readout - kPixM-Trk is optimized for the tracker. It has pixels of 50µmx500µm size arranged in a 2400x200 matrix. A position resolution of <14 µm is expected, together with a S/N for a single MIP of at least 20. - kPixM-Cal is optimized for the calorimeter and thus for large signal and large number of hits per train. It has pixels of 1000µmx1000µm size arranged in a 100x100 matrix. A S/N for a single MIP of at least 4 is expected. 12


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