Presentation is loading. Please wait.

Presentation is loading. Please wait.

Microelectronic Circuits SJTU Yang Hua Chapter 6 Differential and Multistage Amplifiers Introduction 6.1 The BJT differntial pair 6.2 Small-signal operation.

Similar presentations


Presentation on theme: "Microelectronic Circuits SJTU Yang Hua Chapter 6 Differential and Multistage Amplifiers Introduction 6.1 The BJT differntial pair 6.2 Small-signal operation."— Presentation transcript:

1 Microelectronic Circuits SJTU Yang Hua Chapter 6 Differential and Multistage Amplifiers Introduction 6.1 The BJT differntial pair 6.2 Small-signal operation of the BJT differential amplifier 6.3 Other nonideal characteristics of the differential amplifier 6.4 MOS diffenrential amplifiers 6.5 Biasing in intergrated circuits 6.6 The BJT differential amplifier with active load 6.9 Multistage amplifiers

2 SJTU Yang HuaMicroelectronic Circuits Introduction  The differential amplifier (pair) configuration is the most widely used building block in analog IC design.  BJT differential amplifier is the basis of a very- high-speed logic circuit family, called emitter- coupled logic (ECL). Why?

3 SJTU Yang HuaMicroelectronic Circuits Reasons: Direct coupling between signal source and amplifier will easily cause temperature Drift (zero drift). What shall we do?

4 SJTU Yang HuaMicroelectronic Circuits

5 SJTU Yang HuaMicroelectronic Circuits Advantages  There are 2 reasons for using differential in preference to single-ended amplifiers. (1) Differential circuits are much less sensitive to noise and interference than single-ended circuits. (2) It enables us to bias the amplifier and to couple amplifier stage without the need of bypass and coupling capacitors which are impossible to fabricate economically by IC technology.

6 SJTU Yang HuaMicroelectronic Circuits 6.1 The BJT Differential Pair Basic Operation-1:Common-mode input  The differential pair with a common- mode input signal v CM.  Two transistors are matched.  Current source with infinite output resistance.  Current I divide equally between two transistors.  The difference in voltage between the two collector is zero.  The differential pair rejects the common-mode input signal as long as two transistors remain in active region.

7 SJTU Yang HuaMicroelectronic Circuits Basic Operation-2  The differential pair with a “large” differential input signal.  Q 1 is on and Q 2 is off.  Current I entirely flows in Q 1.

8 SJTU Yang HuaMicroelectronic Circuits Basic Operation-3  The differential pair with a large differential input signal of polarity opposite to that in (b).  Q 2 is on and Q 1 is off.  Current I entirely flows in Q 2.

9 SJTU Yang HuaMicroelectronic Circuits Basic Operation-4:Difference-mode or Difference signals  The differential pair with a small differential input signal v i.  Small signal operation or linear amplifier.  Assuming the bias current source I to be ideal and thus I remains constant with the change in v CM.  Increment in Q 1 and decrement in Q 2.

10 SJTU Yang HuaMicroelectronic Circuits Large-Signal Operation

11 SJTU Yang HuaMicroelectronic Circuits Large-Signal Operation Nonlinear curves. Linear segments. Maximum value of input differential voltages as a small-signal amplifier can be used as a fast current switch Enlarge the linear segment by including equal resistance Re in series with the emitters.

12 SJTU Yang HuaMicroelectronic Circuits Large-Signal Operation The transfer characteristics of the BJT differential pair (a) can be linearized by including resistances in the emitters.

13 SJTU Yang HuaMicroelectronic Circuits 6.2 Small-signal operation of the BJT differential amplifier The currents and voltages in the differential amplifier when a small differential input signal v id is applied.

14 SJTU Yang HuaMicroelectronic Circuits A simple technique for determining the signal currents in a differential amplifier excited by a differential voltage signal v id ; dc quantities are not shown. Small-Signal Operation

15 SJTU Yang HuaMicroelectronic Circuits Small-Signal Operation  A differential amplifier with emitter resistances.  Only signal quantities are shown (in color).

16 SJTU Yang HuaMicroelectronic Circuits Input Differential Resistance Input differential resistance is finite. The resistance seen between the two bases is equal to the total resistance in the emitter circuit multiplied by (1+β). Input differential resistance of differential pair with emitter resistors.

17 SJTU Yang HuaMicroelectronic Circuits Differential Voltage Gain Differential voltage gain  Output voltage taken single-ended  Output voltage taken differentially

18 SJTU Yang HuaMicroelectronic Circuits Differential Voltage Gain Differential voltage gain of the differential pair with resistances in the emitter loads  Output voltage taken single-ended  Output voltage taken differentially The voltage gain is equal to the ratio of the total resistance in the collector circuit to the total resistance in the emitter circuit.

19 SJTU Yang HuaMicroelectronic Circuits Differential Half-Circuit Analysis  Differential input signals.  Single voltage at joint emitters is zero.  The circuit is symmetric.  Equivalent common-emitter amplifiers in (b).

20 SJTU Yang HuaMicroelectronic Circuits Differential Half-Circuit Analysis  This equivalence applies only for differential input signals.  Either of the two common-emitter amplifiers can be used to find the differential gain, differential input resistance, frequency response, and so on  Half circuit is biased at I/2.  The voltage gain(with the output taken differentially) is equal to the voltage of half circuit.

21 SJTU Yang HuaMicroelectronic Circuits Differential Half-Circuit Analysis  The differential amplifier fed in a single-ended manner.  Signal voltage at the emitter is not zero.  Almost identical to the symmetric one.

22 SJTU Yang HuaMicroelectronic Circuits Common-Mode Gain The differential amplifier fed by a common-mode voltage signal v icm.

23 SJTU Yang HuaMicroelectronic Circuits Common-Mode Gain Equivalent “half-circuits” for common-mode calculations.

24 SJTU Yang HuaMicroelectronic Circuits Common-Mode Gain Common-mode voltage gain  Output voltage taken single-ended  Output voltage taken differentially

25 SJTU Yang HuaMicroelectronic Circuits Common-Mode Rejection Ratio Common-mode rejection ratio  Output voltage taken single-ended  Output voltage taken differentially This is true only when the circuit is symmetric. Mismatch on CMRR

26 SJTU Yang HuaMicroelectronic Circuits Input Common-Mode Resistance  Definition of the input common-mode resistance R icm.  The equivalent common-mode half-circuit.

27 SJTU Yang HuaMicroelectronic Circuits Input Common-Mode Resistance Input common-mode resistance Input common-mode resistance is very large.

28 SJTU Yang HuaMicroelectronic Circuits Example 6.1

29 SJTU Yang HuaMicroelectronic Circuits Example6.1 (cont ’ d) Evaluate the following: The input differential resistance. The overall differential voltage gain(neglect the effect of r o ). The worst-case common-mode gain if the two collector resistance are accurate within ±1%. The CMRR, in dB. The input common-mode resistance(suppose the Early voltage is 100V).

30 SJTU Yang HuaMicroelectronic Circuits 6.3 Other Nonideal characteristic of the Differential Amplifier Input offset voltage Vos Ideal differential pair is perfectly matched, but practical circuits exhibits Mismatches that result in a dc Vo is not zero. Vo is the output dc offset Voltage. Input offset voltage Vos: Input bias and offset currents I os perfectly matched Input Common-Mode Range

31 SJTU Yang HuaMicroelectronic Circuits 6.4 MOS Differential Amplifiers

32 SJTU Yang HuaMicroelectronic Circuits Operation with a Common – Mode Input Voltage

33 SJTU Yang HuaMicroelectronic Circuits Operation with a Common – Mode Input Voltage Symmetry circuit. Common-mode voltage. Current I divides equally between two transistors. The difference between two drains is zero. The differential pair rejects the common- mode input signals.

34 SJTU Yang HuaMicroelectronic Circuits Operation with a Differential Input Voltage  The MOS differential pair with a differential input signal v id applied.  With v id positive: v GS1  v GS2, i D1  i D2, and v D1  v D2 ; thus ( v D2  v D1 ) will be positive.  With v id negative: v GS1  v GS2, i D1  i D2, and v D1  v D2 ; thus ( v D2  v D1 ) will be negative.

35 SJTU Yang HuaMicroelectronic Circuits Operation with a Differential Input Voltage Differential input voltage. Response to the differential input signal. The current I can be steered from one MOS to the other by varying the differential input voltage in the range: When differential input voltage is very small, the differential output voltage is proportional to it, and the gain is high.

36 SJTU Yang HuaMicroelectronic Circuits Large-Signal Operation  Transfer characteristic curves  Normalized plots of the currents in a MOSFET differential pair.  Note that V OV is the overdrive voltage at which Q 1 and Q 2 operate when conducting drain currents equal to I/2.

37 SJTU Yang HuaMicroelectronic Circuits Large-Signal Operation Nonlinear curves. Maximum value of input differential voltage. When v id = 0, two drain currents are equal to I/2. Linear segment. Linearity can be increased by increasing overdrive voltage(see next slide). Price paid is a reduction in gain(current I is kept constant).

38 SJTU Yang HuaMicroelectronic Circuits Large-Signal Operation The linear range of operation of the MOS differential pair can be extended by operating the transistor at a higher value of V OV.

39 SJTU Yang HuaMicroelectronic Circuits Small-Signal Operation of MOS Differential Pair Linear amplifier Differential gain Common-mode gain Common-mode rejection ratio(CMRR) Mismatch on CMRR

40 SJTU Yang HuaMicroelectronic Circuits Differential Gain  a common-mode voltage applied to set the dc bias voltage at the gates.  v id applied in a complementary (or balanced) manner.

41 SJTU Yang HuaMicroelectronic Circuits Differential Gain Signal voltage at the joint source connection must be zero.

42 SJTU Yang HuaMicroelectronic Circuits Differential Gain An alternative way of looking at the small- signal operation of the circuit.

43 SJTU Yang HuaMicroelectronic Circuits Differential Gain Differential gain  Output taken single-ended  Output taken differentially  Advantages of output signal taken differentially Reject common-mode signal Increase in gain by a factor of 2(6dB)

44 SJTU Yang HuaMicroelectronic Circuits Differential Gain MOS differential amplifier with r o and R SS taken into account.

45 SJTU Yang HuaMicroelectronic Circuits Differential Gain  Equivalent circuit for determining the differential gain.  Each of the two halves of the differential amplifier circuit is a common-source amplifier, known as its differential “half-circuit.”

46 SJTU Yang HuaMicroelectronic Circuits Differential Gain Differential gain  Output taken single-ended  Output taken differentially

47 SJTU Yang HuaMicroelectronic Circuits Common-Mode Gain The MOS differential amplifier with a common- mode input signal v icm.

48 SJTU Yang HuaMicroelectronic Circuits Common-Mode Gain  Equivalent circuit for determining the common-mode gain (with r o ignored).  Each half of the circuit is known as the “common-mode half-circuit.”

49 SJTU Yang HuaMicroelectronic Circuits Common-Mode Gain Common-mode gain  Output taken single-ended  Output taken differentially

50 SJTU Yang HuaMicroelectronic Circuits Common-Mode Rejection Ratio Common-mode rejection ratio(CMRR)  Output taken single-ended  Output taken differentially This is true only when the circuit is perfectly matched.

51 SJTU Yang HuaMicroelectronic Circuits Mismatch on CMRR Effect of R D mismatch on CMRR Effect of g m mismatch on CMRR

52 SJTU Yang HuaMicroelectronic Circuits Mismatch on CMRR  Determine the common- mode gain resulting from a mismatch in the g m values of Q 1 and Q 2.  Common-mode half circuit is not available due to mismatch in circuit.  The nominal value g m.

53 SJTU Yang HuaMicroelectronic Circuits Mismatch on CMRR Effect of g m mismatch on CMRR

54 SJTU Yang HuaMicroelectronic Circuits Homework March 30, 2009 6.1; 6.18; 6.21; 6.27; 6.87

55 SJTU Yang HuaMicroelectronic Circuits 6.5 Biasing in Integrated Circuits

56 SJTU Yang HuaMicroelectronic Circuits Design Philosophy of Integrated Circuits Strive to realize as many of the functions required as possible using MOS transistors only.  Large even moderate value resistors are to be avoided  Constant-current sources are readily available.  Coupling and bypass capacitors are not available to be used, except for external use.

57 SJTU Yang HuaMicroelectronic Circuits Design Philosophy of Integrated Circuits Low-voltage operation can help to reduce power dissipation but poses a host of challenges to the circuit design. Bipolar integrated circuits still offer many exciting opportunities to the analog design engineer.

58 SJTU Yang HuaMicroelectronic Circuits Biasing mechanism for ICs BJT Circuits  The basic BJT current source  Current-steering MOSFET Circuits  The basic MOSFET current source  MOS current-steering circuits

59 SJTU Yang HuaMicroelectronic Circuits Biasing mechanism for ICs(cont ’ d) Current-mirror circuits with improved performance  A bipolar mirror with base-current compensation  The wilson current mirror  The current steering circuits  The widlar current source

60 SJTU Yang HuaMicroelectronic Circuits The Basic BJT Current Mirror

61 SJTU Yang HuaMicroelectronic Circuits A Simple BJT Current Source. Disadvantages: 1)Increasing I o …… 2)Decreasing I o ……

62 SJTU Yang HuaMicroelectronic Circuits Current Steering

63 SJTU Yang HuaMicroelectronic Circuits Current-Mirror Circuits with Improved Performance Two performance parameters need to be improved: a. The accuracy of the current transfer ratio of the mirror. b. The output resistance of the current source.

64 SJTU Yang HuaMicroelectronic Circuits Current Mirror with Base-Current Compensation

65 SJTU Yang HuaMicroelectronic Circuits The Wilson Bipolar Current Mirror

66 SJTU Yang HuaMicroelectronic Circuits The Widlar Current Source

67 SJTU Yang HuaMicroelectronic Circuits The advantages of Widlar Current Source Example6.2 p518 1. Widlar circuit allows the generation of a small constant current using relatively small resistors( saving in chip area ). 2. Another important characteristic of the widlar current source is that its output resistance is high.

68 SJTU Yang HuaMicroelectronic Circuits The Basic MOSFET Current Source

69 SJTU Yang HuaMicroelectronic Circuits MOS Current-Steering Circuits

70 SJTU Yang HuaMicroelectronic Circuits The Wilson MOS Current Mirror

71 SJTU Yang HuaMicroelectronic Circuits 6.6 The Differential Amplifier with Active Load Replace resistance R D with a constant current source results in a much high voltage gain as well as saving in chip area. Convert the output from differential to single-ended.

72 SJTU Yang HuaMicroelectronic Circuits The Bipolar Differential Pair with Active Load Active-loaded bipolar differential pair. Quiescent analysis: if the circuit Is perfectly matched, no output Current flows through the output Terminal.

73 SJTU Yang HuaMicroelectronic Circuits Determine the Transconductance

74 SJTU Yang HuaMicroelectronic Circuits Differential Gain The differential gain is determined as G m R o When Input differential resistance

75 SJTU Yang HuaMicroelectronic Circuits Common-Mode Gain and CMRR  Common-mode gain:  CMRR

76 SJTU Yang HuaMicroelectronic Circuits Differential-to-Single-Ended Conversion A simple but inefficient approach for differential to single-ended conversion. Drawback: Lose a factor of 2(or 6 dB)

77 SJTU Yang HuaMicroelectronic Circuits The Active-Loaded MOS Differential Pair The active-loaded MOS differential pair.

78 SJTU Yang HuaMicroelectronic Circuits The Active-Loaded MOS Differential Pair

79 SJTU Yang HuaMicroelectronic Circuits The Active-Loaded MOS Differential Pair The circuit with a differential input signal applied, neglecting the r o of all transistors.

80 SJTU Yang HuaMicroelectronic Circuits Differential Gain of the Active- Loaded MOS Pair The output resistance r o plays a significant role in the operation of active-loaded amplifier. Asymmetric circuit. Half-circuit is not available. The gain will be determined as G m R o

81 SJTU Yang HuaMicroelectronic Circuits Short-Circuit Transconductance Determining the short-circuit transconductance G m = i o / v id

82 SJTU Yang HuaMicroelectronic Circuits Short-Circuit Transconductance

83 SJTU Yang HuaMicroelectronic Circuits Output Resistance Circuit for determining R o. The circled numbers indicate the order of the analysis steps.

84 SJTU Yang HuaMicroelectronic Circuits Output Resistance  Circuit for determining R o.  The circled numbers indicate the order of the analysis steps.

85 SJTU Yang HuaMicroelectronic Circuits Differential Gain The differential gain is determined as G m R o When

86 SJTU Yang HuaMicroelectronic Circuits Common-Mode Gain and CMRR  Analysis of the active- loaded MOS differential amplifier to determine its common-mode gain.  Power supplies eliminated.  R ss is the output resistance of the current source.

87 SJTU Yang HuaMicroelectronic Circuits Common-Mode Gain and CMRR  Asymmetric circuit.  Each of the two transistors as a CS configuration with a large source degeneration resistance 2R ss.  Common-mode gain:  CMRR

88 SJTU Yang HuaMicroelectronic Circuits Comparison with MOS circuits 1. The MOS mirror does not suffer from the finite- βeffect. 2. In the BJT mirror and current source, the output voltage can be within V CEsat ; the corresponding value in MOS circuit is V GS -V t >V CEsat, where power- supply voltages are being steadily reduced. 3. The current transfer ratio in the BJT mirror is determined by the relative areas of the transistors, whereas in a MOS mirror it is determined by the relative (W/L) ratio. 4. Both of mirror circuit have an output resistance of r o =V A /I, however, V A is usually lower for MOS devices. Note: The fifth edition P550-552

89 SJTU Yang HuaMicroelectronic Circuits Homework April 8th, 2009 6.45; D6.60;

90 SJTU Yang HuaMicroelectronic Circuits 6.7 Multistage Amplifiers

91 SJTU Yang HuaMicroelectronic Circuits Multistage Amplifier

92 SJTU Yang HuaMicroelectronic Circuits Multistage Amplifier The first stage(input stage) is differential-in, differential-out and consists of Q 1 and Q 2. The second stage is differential-in, single-ended- out amplifier which consists of Q 3 and Q 4. The third stage is CE amplifier which consists of pnp transistor Q 7 to shifting the dc level. The last stage is the emitter follower. Biasing stage.

93 SJTU Yang HuaMicroelectronic Circuits

94 SJTU Yang HuaMicroelectronic Circuits Multistage Amplifier Equivalent circuit for calculating the gain of the input stage of the example. Input differential resistance Gain of first stage

95 SJTU Yang HuaMicroelectronic Circuits Multistage Amplifier Equivalent circuit for calculating the gain of the second stage of the example. Gain of second stage

96 SJTU Yang HuaMicroelectronic Circuits Multistage Amplifier Equivalent circuit for calculating the gain of the third stage of the example. Gain of third stage

97 SJTU Yang HuaMicroelectronic Circuits Multistage Amplifier Equivalent circuit for calculating the gain of the output stage of the example. Gain of output stage Output resistance

98 SJTU Yang HuaMicroelectronic Circuits Two-Stage CMOS Op-Amp Configuration

99 SJTU Yang HuaMicroelectronic Circuits Homework: April 8th, 2008 6.87 6.121


Download ppt "Microelectronic Circuits SJTU Yang Hua Chapter 6 Differential and Multistage Amplifiers Introduction 6.1 The BJT differntial pair 6.2 Small-signal operation."

Similar presentations


Ads by Google