1. Fall 2006 1 EE 333 Lillevik 333f06-l18 University of Portland School of Engineering Computer Organization Lecture 18 IF, ID, R-type microprogramming Exam 2 review

2. Fall 2006 2 EE 333 Lillevik 333f06-l18 University of Portland School of Engineering Microprogramming overview Review instructions, understand goals Determine state diagram Microprogram individual instructions –List tokens on one line –Repeat for remaining clocks Merge all instructions Test, test, test

3. Fall 2006 3 EE 333 Lillevik 333f06-l18 University of Portland School of Engineering MicroAsm Java application: MicroAsm.class, SavitchIn.class Microinstruction: free format, no fixed fields Requires input file: text-only, file.upg Creates output file: file.txt Errors: command line file name, file I/O, unrecognizable token Execution: BlueJ or DOS command line

4. Fall 2006 4 EE 333 Lillevik 333f06-l18 University of Portland School of Engineering MicroAsm syntax Directives org: nbr Sets uPC to value of nbr, used with branch token // comment Everthing after // ignored Each line –directives (optional) –tokens (signals to assert) –last line contains return

5. Fall 2006 5 EE 333 Lillevik 333f06-l18 University of Portland School of Engineering MicroAsm source format

6. Fall 2006 6 EE 333 Lillevik 333f06-l18 University of Portland School of Engineering uProgram tokens TokenValueFunction Branch0000 0100Branch the uPgm to the opcode (default is next address) Rwr0000 0400Write to the REG file Imm0000 0800uPgm controls ALU function (default is IR[3:0]) PCinc0000 1000Increment the PC PCwr0000 2000Write to the PC PCwrcond0000 4000Write to the PC if EQ is asserted EPC0000 8000Select EPC for PC write IoD0001 0000Select RALU for memory address (default is PC) MEMwr0002 0000Write to the memory (default is to read) IRwr0004 0000Write to the IR MDRwr0008 0000Write to the MDR

7. Fall 2006 7 EE 333 Lillevik 333f06-l18 University of Portland School of Engineering uProgram tokens, continued. TokenValueFunction SPCwr0010 0000Write to SPC register PCsrc0020 0000PC write data is branch address (default is jump address) ALUa-R0 ALUa-PC 0040 0000 0000 First ALU argument is R0 First ALU argument is PC (default is PC) ALUb-R1 ALUb-Ext ALUb-Trnc 0000 0080 0000 0100 0000 Second ALU argument is R1 Second ALU argument is Sign Extended offset Second ALU argument is Truncated offset REG-RALU REG-MDR 0000 0200 0000 REG write data is the RALU REG write data is the MDR

8. Fall 2006 8 EE 333 Lillevik 333f06-l18 University of Portland School of Engineering uProgram tokens, continued. TokenValueFunction REGfmt0800 0000Selects IR[10] for the REG destination (default is IR[9]) ALUOpadd ALUOpsub ALUOpand ALUOpor ALUOpsll ALUOpsrl 0000 1000 0000 2000 0000 3000 0000 8000 0000 9000 0000 ALU function is add ALU function is subtract ALU function is logical AND ALU function is logical OR ALU function is shift left logically ALU function is shift right logically Next Return uPC+1 00 Inserts uPC+1 into uPgm next address (default) Inserts 00 into uPgm next address

9. Fall 2006 9 EE 333 Lillevik 333f06-l18 University of Portland School of Engineering

10. Fall 2006 10 EE 333 Lillevik 333f06-l18 University of Portland School of Engineering

11. Fall 2006 11 EE 333 Lillevik 333f06-l18 University of Portland School of Engineering Partial MDP16 state diagram A G C D E F H B JI Lw or Sw R-fmt Beq Jump Reset Lw Sw

12. Fall 2006 12 EE 333 Lillevik 333f06-l18 University of Portland School of Engineering MDP16 state diagram IDID sll no p R- f m t swsw srllw add i be q j ori sub i and i IF Reset 1- 3 additional clocks 2 clocks

13. Fall 2006 13 EE 333 Lillevik 333f06-l18 University of Portland School of Engineering IF state ? Write instruction from memory into IR Increment the program counter IRwr PCin c

14. Fall 2006 14 EE 333 Lillevik 333f06-l18 University of Portland School of Engineering ID state ? Determine optimistic branch address Branch to opcode Alua-pc Alub-ext imm aluopadd branch

15. Fall 2006 15 EE 333 Lillevik 333f06-l18 University of Portland School of Engineering R-type instruction Op code: 01 Func bits (IR[3:0]) determine ALU operation Write result into register file

16. Fall 2006 16 EE 333 Lillevik 333f06-l18 University of Portland School of Engineering R-type EX state? Origin: 0x10 Operation: clock 3 –RALUout = A funct B Functional units –ALU funct = IR[0:3] –ALU inputs R0 R1 Org: 10 alua-r0 Alub-r1

17. Fall 2006 17 EE 333 Lillevik 333f06-l18 University of Portland School of Engineering R-type WB state? Next: return to IF Operation: clock 4 –Reg [ IR(9)] = ALUout Functional units –Must write to reg file –Data comes from RALU –Use IR[9] as destination register rwr reg-ralu return

18. Fall 2006 18 EE 333 Lillevik 333f06-l18 University of Portland School of Engineering Exam 2 review See website Syllabus & Reference page

19. Fall 2006 19 EE 333 Lillevik 333f06-l18 University of Portland School of Engineering

20. Fall 2006 20 EE 333 Lillevik 333f06-l18 University of Portland School of Engineering IF state ? Write instruction from memory into IR Increment the program counter IRWr PCinc

21. Fall 2006 21 EE 333 Lillevik 333f06-l18 University of Portland School of Engineering ID state ? Determine optimistic branch address Dispatch to opcode Imm aluA_Pc aluB_Ext aluOpAdd branch

22. Fall 2006 22 EE 333 Lillevik 333f06-l18 University of Portland School of Engineering IF, ID microprogram Two microinstructions, two ROM contents

23. Fall 2006 23 EE 333 Lillevik 333f06-l18 University of Portland School of Engineering R-type microprogram Func bits (IR[3:0]) determine ALU operation Write result into register file aluA_R0 aluB_R1 Rwr reg_Ralu Return

24. Fall 2006 24 EE 333 Lillevik 333f06-l18 University of Portland School of Engineering R-type microprogram