1. SDR Architectures Bilal Saqib

2. Software Execution Procedure in SDR  SDR should be compatible with various hardwares and softwares. 1

3. Hardware & Software Division  Hardware Analog Digital  Software Basic Program  Radio Function Libraries  OS and Device Drivers Application Program 1

4. Conventional Software Execution Procedure 1

5. Software Execution Procedure for SDR 1

6. Single-Chip Architecture for SDR  Hybrid Architecture Reconfigurable Signal Processors Accelerators Additional Hardware Circuits Programmable State Machine (PSM) Central Processing Unit (CPU) Crossbar type Connections  By changing configuration programs of RSP and Accelerator parameters, SDR LSI can be reconfigured to operate with many wireless communication systems. 2

7. Block Diagram of SDR LSI 2

8. RSP 2

9. 2

10. Accelerators 2

11. PSM 2

12. Evaluation Board 2

13. References 1.Yoshida, H.; Tsurumi, H.; Suzuki, Y., "Broadband RF front-end and software execution procedure in software-defined radio," Vehicular Technology Conference, 1999. VTC 1999 - Fall. IEEE VTS 50th, vol.4, no., pp.2133-2137 vol.4, 1999 URL: http://ieeexplore.ieee.org/iel5/6454/17259/007 97315.pdf?isnumber=17259&prod=STD&arnumber=7 97315&arnumber=797315&arSt=2133&ared=2137+v ol.4&arAuthor=Yoshida%2C+H.%3B+Tsurumi%2C+H.%3B+Suzuki%2C+Y. 2.Whitepaper on Single-Chip Baseband Signal Processor for Software-Defined Radio by Seiichi Nishijima, Miyoshi Saito and Iwao SugiyamaSingle-Chip Baseband Signal Processor for Software-Defined Radio