1. Template This is a template to help, not constrain, you. Modify as appropriate. Move bullet points to additional slides as needed. Don’t cram onto a single slide in small font. Feel free to add content, but stay within your time limit

2. Present and Future Computing Requirements for [enter your project] Presenter Affiliation NERSC ASCR Requirements for 2017 January 15, 2014 LBNL

3. 1. Project Description List of Pi(s)/Institution(s) Summarize your project(s) and its scientific objectives through 2017 Our present focus is … By 2017 we expect to …

4. 2. Computational Strategies We approach this problem computationally at a high level by … The codes we use are … These codes are characterized by these algorithms: … Our biggest computational challenges are … Our parallel scaling is limited by … We expect our computational approach and/or codes to change (or not) by 2017 in this way …

5. 3. Current HPC Usage (see slide notes) Machines currently using (NERSC or elsewhere) Hours used in 2012-2013 (list different facilities) Typical parallel concurrency and run time, number of runs per year Data read/written per run Memory used per (node | core | globally) Necessary software, services or infrastructure Data resources used (/scratch,HPSS, NERSC Global File System, etc.) and amount of data stored

6. 4. HPC Requirements for 2017 (Key point is to directly link NERSC requirements to science goals ) Compute hours needed (in units of Hopper hours) Changes to parallel concurrency, run time, number of runs per year Changes to data read/written Changes to memory needed per ( core | node | globally ) Changes to necessary software, services or infrastructure

7. 5. Strategies for New Architectures (1 of 2) Does your software have CUDA/OpenCL directives; if yes, are they used, and if not, are there plans for this? Does your software run in production now on Titan using the GPUs? Does your software have OpenMP directives now; if yes, are they used, and if not, are there plans for this? Does your software run in production now on Mira or Sequoia using threading? Is porting to, and optimizing for, the Intel MIC architecture underway or planned?

8. 5. Strategies for New Architectures (2 of 2) Have there been or are there now other funded groups or researchers engaged to help with these activities? If you answered "no" for the questions above, please explain your strategy for transitioning your software to energy-efficient, manycore architectures What role should NERSC play in the transition to these architectures? What role should DOE and ASCR play in the transition to these architectures? Other needs or considerations or comments on transition to manycore:

9. 5. Special I/O Needs Does your code use checkpoint/restart capability now? Do you foresee that a burst buffer architecture would provide significant benefit to you or users of your code? Scenarios for possible Burst Buffer use are on http://www.nersc.gov/assets/Trinity--NERSC-8-RFP/Documents/trinity- NERSC8-use-case-v1.2a.pdf

10. 6. Summary What new science results might be afforded by improvements in NERSC computing hardware, software and services? Recommendations on NERSC architecture, system configuration and the associated service requirements needed for your science NERSC generally refreshes systems to provide on average a 2X performance increase every year. What significant scientific progress could you achieve over the next 5 years with access to 32X your current NERSC allocation? What "expanded HPC resources" are important for your project? General discussion