2. Introduction to Software RADIO What is the Software RADIO ? Advantage of the Software RADIO Physical Layer of a Radio Modem/Software Defined Radio Modem Instances of Software RADIO Software Defined RADIO Project Reconfigurable Chip design example Example of Development Tool/Configurable Resource Methodology of Software RADIO Technical Challenge Multi Mode and Reconfigurable Terminals Components Hardware Reconfiguration SDR Functional Blocks Description

4. Ideal 한 목표 : 채널 변복조 waveform 을 Software 를 이용. TX:source encoder, up-conversion of baseband signal to carry frequency RX:carry phase recovery, symbol or PN code timing recovery 개방형 구조 (Open Architecture) 다중 대역, 다중 모드 대부분의 기능들이 소프트웨어 -programmable, 하드웨어 - 재구성가 능한 프로세서 엘리먼트에서 소프트웨어에 의해 실현 Configurable-ASIC, DSP 칩, 마이크로프로세서 칩, FPGA, 다른 programmable-DSP

5. 개발 및 유지 / 보수해야 하는 제품 플랫폼 수 감소 One platform supports any physical layer, protocol stack Lower System maintenance & upgrade cost No hardware replacement or frequent upgrade 체계적으로 스케일될 수 있는 제품구조 새로이 진화되어 가고 있는 capacity 수용 Backward Compatibility 미래 안정적 (Future-Proof) 시스템 개발 Time-to-Market 최소화

6. Run-time configurable ASIC: DS spreading, Chip shaping (FIR filter), Timing recovery, Antijam, transmission security, Correlator(low precision arithmetic to reduce power consumption) Maximize the number of functions performed by the DSP: Data burst, FEC, Interleaving, Adaptive S.P. Deinterleaver, Adaptive Decoder SDR 기술에 적용 가능한 분야

7. Typical Signal Processing blocks in software Defined Radio SDR Forum Recommended

8. ADC sampling rate dynamic range (determine precision of arithmetic operations) translation of digital IF to baseband modulation/demodulation algorithms error coding/decoding algorithms synchronization algorithms

10. Technical Approach co-simulation methodology 를 사용하여 설계 re-configurable FPGA devices 를 포함한 platform 를 개 발 physical hardware 설계 및 검증 일차적으로 re-configurable ASICs 생성 동일한 logic 를 FPGA 형태로 재생성 SDR Platform 으로 구현될 수 없는 service 를 정의. Partition and real-time operation, optimization (power, complexity, size, performance) 유사 project : TRUST http://www.ist-trust.org

11. Radio Architecture, RF 기술에 집중 Re-configurable Radio applications 에 적합한 Zero IF, single IF Radio Front-End re-configuration SOI, BICMOSSi-Ge 과 Micro-Machining 등과 같 은 다양한 기술하에서 front-end 구조를 개발. function partitioning 의 최적화

12. low power : low-power DSP and MCU processor in combination with a small, low power programmable logic device (PLD). Functions needed for GSM Phase 2+ or UMTS terminal. DSP16000 and ARM7 MCU, Xilinx’s CoolRunner PLD with extreme low power consumption (<0.5mA) serve as HW co-processor for MCU, DSP or both. reconfigurable coprocessor SW part designed in Processor Expert™ Embedded Beans library

13. Object oriented, component based embedded application CASE development tool code portability, component reusability expert knowledge system assistance. virtual prototyping IP sharing by embedded components exchange. GSM - UMTS components (Embedded Beans) as building blocks MCU expert knowledge system calculates overall system timing propagation automatic connection of peripherals Verifies the application timing Processor Expert™ generates resulting source code (in selected language – typically C, ASM, C++ or VHDL).

18. 다중 대역 안테나 선형 광대역 RF 부품 광대역 A/D, D/A 변환기 고성능 DSP/ 재구성 가능한 로직

27. 기능 분석을 통해, 각 기능 블록 별로 common function 의 최소의 오버헤드로의 개발 DSP 와 FPGA 구현시 데이터 처리율 및 소요 면 적 비교 요구되는 데이터율 및 제어를 고려하여 ASIC/DSP/FPGA 간의 분할