1. EE 616 1 EE 616 Computer Aided Analysis of Electronic Networks Lecture 2 Instructor: Dr. J. A. Starzyk, Professor School of EECS Ohio University Athens, OH, 45701

2. EE 616 2 Review and Outline Review of the previous lecture -- Class organization -- CAD overview Outline of this lecture * Review of network scaling * Review of Thevenin/Norton Analysis * Formulation of Circuit Equations -- KCL, KVL, branch equations -- Sparse Tableau Analysis (STA) -- Nodal analysis -- Modified nodal analysis

3. EE 616 3 Network scaling

4. EE 616 4 Network scaling (cont’d)

5. EE 616 5 Network scaling (cont’d)

6. EE 616 6 V oc Thevenin equivalent circuit Z Th +–+– Norton equivalent circuit Z Th I sc Note: attention to the voltage and current direction Review of the Thevenin/Norton Analysis

7. EE 616 7 1. Pick a good breaking point in the circuit (cannot split a dependent source and its control variable). 2.Replace the load by either an open circuit and calculate the voltage E across the terminals A-A’, or a short circuit A-A’ and calculate the current J flowing into the short circuit. E will be the value of the source of the Thevenin equivalent and J that of the Norton equivalent. 3. To obtain the equivalent source resistance, short-circuit all independent voltage sources and open-circuit all independent current sources. Transducers in the network are left unchanged. Apply a unit voltage source (or a unit current source) at the terminals A-A’ and calculate the current I supplied by the voltage source (voltage V across the current source). The Rs = 1/I (Rs = V). Review of the Thevenin/Norton Analysis

8. EE 616 8 Modeling

9. EE 616 9 Formulation of circuit equations (cont’d)

10. EE 616 10 Ideal two-terminal elements

11. EE 616 11 Ideal two-terminal elements Topological equations

12. EE 616 12 Determined by the topology of the circuit Kirchhoff’s Current Law (KCL): The algebraic sum of all the currents leaving any circuit node is zero. Kirchhoff’s Voltage Law (KVL): Every circuit node has a unique voltage with respect to the reference node. The voltage across a branch e b is equal to the difference between the positive and negative referenced voltages of the nodes on which it is incident KVL and KCL

13. EE 616 13 Unknowns – B branch currents(i) – N node voltages(e) – B branch voltages(v) Equations – KCL: N equations – KVL: B equations – Branch equations: B equations Formulation of circuit equations (cont’d)

14. EE 616 14 Determined by the mathematical model of the electrical behavior of a component – Example: V=R·I In most of circuit simulators this mathematical model is expressed in terms of ideal elements Branch equations

15. EE 616 15 Matrix form of KVL and KCL N equations B equations

16. EE 616 16 K v v + i = i s B equations Branch equation

17. EE 616 17 1 2 3 j B 12iN12iN branches nodesnodes (+1, -1, 0) { A ij = +1 if node i is terminal + of branch j -1 if node i is terminal - of branch j 0 if node i is not connected to branch j PROPERTIES A is unimodular 2 nonzero entries in each column Node branch incidence matrix

18. EE 616 18 – Sparse Table Analysis (STA) Brayton, Gustavson, Hachtel – Modified Nodal Analysis (MNA) McCalla, Nagel, Roher, Ruehli, Ho Equation Assembly for Linear Circuits

19. EE 616 19 Sparse Tableau Analysis (STA)

20. EE 616 20 Advantages and problems of STA

21. EE 616 21 1.Write KCL A·i=0 (N equations, B unknowns) 2.Use branch equations to relate branch currents to branch voltages i=Yv(B equations, B unknowns) 3. Use KVL to relate branch voltages to node voltages v=A T e(B equations, N unknowns) Y n e=i ns N equations N unknowns N = # nodesNodal Matrix Nodal analysis

22. EE 616 22 Nodal analysis

23. EE 616 23 Spice input format: Rk N+ N- Rkvalue N+ N- N+ N- N+ N- i RkRk KCL at node N+ KCL at node N- Nodal analysis – Resistor “Stamp”

24. EE 616 24 Spice input format: Gk N+ N- NC+ NC- Gkvalue NC+ NC- N+ N- N+ N- GkvcGkvc NC+ NC- +vc-+vc- KCL at node N+ KCL at node N- Nodal analysis – VCCS “Stamp”

25. EE 616 25 Nodal analysis- independent current sources “stamp”

26. EE 616 26 Rules (page 36): 1. The diagonal entries of Y are positive and admittances connected to node j 2. The off-diagonal entries of Y are negative and are given by admittances connected between nodes j and k 3. The jth entry of the right-hand-side vector J is currents from independent sources entering node j Nodal analysis- by inspection

27. EE 616 27 Example of nodal analysis by inspection Exercise Formulate nodal equations by inspection

28. EE 616 28 Example of nodal analysis by inspection

29. EE 616 29 Example of nodal analysis by inspection Exercise Formulate nodal equations by inspection

30. EE 616 30 Example of nodal analysis by inspection Exercise

31. EE 616 31 Nodal analysis (cont’d)

32. EE 616 32 Modified Nodal Analysis (MNA)

33. EE 616 33 Modified Nodal Analysis (2)

34. EE 616 34 Modified Nodal Analysis (3)

35. EE 616 35 General rules for MNA

36. EE 616 36 Example 4.4.1(p.143)

37. EE 616 37 Advantages and problems of MNA

38. EE 616 38 Analysis of networks with VVT’s & Op Amps

39. EE 616 39 Example 4.5.2 (p.145)

40. EE 616 40 Example 4.5.5 (p. 148)

41. EE 616 41 Example 4.5.5 (cont’d)