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1 COMP541 Input Devices: Keyboards, Mice and Joysticks Montek Singh Apr 6, 2015.

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Presentation on theme: "1 COMP541 Input Devices: Keyboards, Mice and Joysticks Montek Singh Apr 6, 2015."— Presentation transcript:

1 1 COMP541 Input Devices: Keyboards, Mice and Joysticks Montek Singh Apr 6, 2015

2 Keyboard Interface USB keyboard plugs into the USB port on Nexys 4 boards

3 3 USB to PS/2 emulation  Host controller on Nexys boards talks to USB keyboard on one side talks to USB keyboard on one side speaks PS/2 protocol to the FPGA on the other side speaks PS/2 protocol to the FPGA on the other side  PS/2 used to be the dominant keyboard protocol  PS/2 = a synchronous serial protocol What does that mean? What does that mean? Each symbol is transmitted bit-by-bit Each symbol is transmitted bit-by-bit  8 data bits + 3 control bits  synchronized to the keyboard’s clock (slow)

4 4 Physical Interface  Two lines Clock (15-20KHz) Clock (15-20KHz) Data Data Normally high, asserted low Normally high, asserted low  Read: pp. 13-14 of Nexys 3 manual pp. 13-14 of Nexys 3 manual pg. 10 of Nexys 4 manual pg. 10 of Nexys 4 manual

5 5Protocol  Bidirectional Kybd-to-host and host-to-kybd on same wires Kybd-to-host and host-to-kybd on same wires  CAPS LOCK light for example  Assert low To send, keyboard starts clocking To send, keyboard starts clocking  sends successive bit on positive edge of clock  host reads bits on negative edges of clock  For your lab: You shouldn’t need to send anything to keyboard You shouldn’t need to send anything to keyboard

6 Protocol  11 bits a start bit: always 0 a start bit: always 0 8 bits of data 8 bits of data  lsb first one parity bit (odd) one parity bit (odd) a stop bit: always 1 a stop bit: always 1  Clocked by keyboard Value should be latched by FPGA on neg edge of keyboard clock Value should be latched by FPGA on neg edge of keyboard clock 6 Illustration from http://www.beyondlogic.org/keyboard/keybrd.htm

7 7 What is Sent  ASCII is not sent!  Scan codes for keys Most keys have an 8-bit (single byte) scancode Most keys have an 8-bit (single byte) scancode Some have two bytes Some have two bytes A few have even more! A few have even more! Most (not all, be careful!) keyboards use these scancodes: Most (not all, be careful!) keyboards use these scancodes: Illustration from Nexys 3 manual Our keyboards have slightly different scan codes! Check before using!

8 8 Scan Codes  Normally translated by software You remap your keys, for example You remap your keys, for example  Software takes care of Shift, caps lock, control Shift, caps lock, control

9 9 Some Scan Codes Long  Two code sequence common Some special keys use even more… Some special keys use even more…  …have a look at Break key!

10 10 Even More Complicated  Scan code generated when you press  And when you release Extra byte: F0 followed by key scan code Extra byte: F0 followed by key scan code Example: Example:  Space pressed, 29 sent  Space released, F0 29 sent

11 11Resources  Information http://www.beyondlogic.org/keyboard/keybrd.htm  Scan codes http://www.barcodeman.com/altek/mule/scandoc.php  Available on the class website: my Verilog for keyboard my Verilog for keyboard

12 12 My Verilog  Have Verilog for keyboard a test/demo which displays data from keyboard onto 7- segment display a test/demo which displays data from keyboard onto 7- segment display have tested it with the FPGA kit; seems to work fine have tested it with the FPGA kit; seems to work fine  To use: You will memory-map the character code register You will memory-map the character code register  give the keyboard a memory address so the CPU can read it using lw instructions Handle presses and releases appropriately in software Handle presses and releases appropriately in software  Either: Check for a key release before reading a new key press  OR: Delaying next key read (by, say, 1/4 th sec) –gives you automatic “key repeat” feature!

13 Mice 13

14 Mouse  Very similar interface (clk & data) But: 3 words sent w/ mouse movement or button press But: 3 words sent w/ mouse movement or button press  Read pp. 12-13 of Nexys 4 manual pp. 12-13 of Nexys 4 manual  Verilog I can guide you to modify keyboard.v to read 3 bytes I can guide you to modify keyboard.v to read 3 bytes 14

15 Movement  Movement is relative XS, YS are sign (+ is up/right) XS, YS are sign (+ is up/right) XY, YY are overflow (too fast) XY, YY are overflow (too fast) L, R are buttons L, R are buttons 15

16 Scroll Wheel, etc.  Extensions to original 2 button PS/2 mouse See http://www.computer-engineering.org/ps2mouse/ See http://www.computer-engineering.org/ps2mouse/ http://www.computer-engineering.org/ps2mouse/ 16

17 Joystick

18 Joystick module  2 axes: x and y 10-bit position values 10-bit position values  On-board microprocessor handles debouncing handles debouncing communicates with host communicates with host  Info on class website reference manual reference manual Verilog code Verilog code  demo: feeds joystick output to the 7- seg display  you will modify to feed the output into your memory-mapped I/O unit instead 18

19 Accelerometer Nexys 4 boards have built-in accelerometer We are working on a Verilog module for it… 19

20 Keypad 20

21 Keypad module  4x4 keypad 0-9, A-F 0-9, A-F one hex character input one hex character input  Simple interface 4-bit row, 4-bit column 4-bit row, 4-bit column a ‘0’ means pressed a ‘0’ means pressed  Info on class website reference manual reference manual Verilog code Verilog code  demo: feeds keypad output to the 7-seg display  you will modify to feed the output into your memory- mapped I/O unit instead 21

22 Stereo Audio Amplifier Nexys 4 has mono amplified built-in, but you can also attach a stereo module (read on…) 22

23 Amplifier module  Stereo output headphone jack compatible headphone jack compatible  Very very low-level…! expects analog waveform on input! expects analog waveform on input! your design on FPGA will have to generate an analog value by rapidly toggling between 0 and 1 your design on FPGA will have to generate an analog value by rapidly toggling between 0 and 1  e.g., 60% of the time ‘1’ value will approximate an analog value of 0.60V (if range is 0-1V)  Verilog code We are working on it … We are working on it … 23


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