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VLSI Layout Algorithms CSE 6404 A 46 B 65 C 11 D 56 E 23 F 8 H 37 G 19 I 12J 14 K 27 X=(AB*CD)+ (A+D)+(A(B+C)) Y = (A(B+C)+AC+ D+A(BC+D)) Dr. Md. Saidur.

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Presentation on theme: "VLSI Layout Algorithms CSE 6404 A 46 B 65 C 11 D 56 E 23 F 8 H 37 G 19 I 12J 14 K 27 X=(AB*CD)+ (A+D)+(A(B+C)) Y = (A(B+C)+AC+ D+A(BC+D)) Dr. Md. Saidur."— Presentation transcript:

1 VLSI Layout Algorithms CSE 6404 A 46 B 65 C 11 D 56 E 23 F 8 H 37 G 19 I 12J 14 K 27 X=(AB*CD)+ (A+D)+(A(B+C)) Y = (A(B+C)+AC+ D+A(BC+D)) Dr. Md. Saidur Rahman

2 A B F E C D ELECTRONIC CIRCUIT Is it possible to lay the circuit on a single layered PCB?

3 A B C D E F POSSIBLE !

4 A B F E C D ELECTRONIC CIRCUIT Is it possible to lay the circuit on a single layered PCB? NOT POSSIBLE

5 A planar graph planar graph non-planar graph

6 Kuratowski’s Theorem A graph is planar if and only if it contains neither a subdivision of K 5 nor a subdiision of K 3,3.

7 Kuratowski’s Theorem A graph is planar if and only if it contains neither a subdivision of K 5 nor a subdiision of K 3,3. Planarity testing algorithm based on Kuratowski’s theorem. Time complexity : exponential.

8 A polynomial time algorithm Idea: decompose a graph with respect to a cycle. C [AP 61, Gol63, Shi69]

9 Pieces C

10 attachment Pieces C

11 Connected components after deleting C

12 attachment

13 P1P1 P2P2 P3P3 P4P4 P5P5 P6P6 Six pieces

14 Separating cycle and nonseparating cycle Separating cycle Nonseparating cycle

15 Lemma Let G be a biconnected graph and let C be a nonseparating cycle of G with piece P. If P is not a path, the G has a separating cycle C’ consisting of a subpath of C plus a path of P between two attachmet.

16 Interlace Two pieces of G, with respect to C, interlace if they cannot be drawn on the same side of C without violating planarity. P2P2 P1P1 P 1 and P 2 interlace.

17 Interlacement Graph The interlacement graph of the pieces of G, with respect to C, is the graph whose vertices are the pieces of G and whose edges are the pairs of pieces that interlace. P2P2 P1P1 P3P3 P4P4 P6P6 P5P5 P1P1 P2P2 P3P3 P4P4 P5P5 P6P6 interlacement graph

18 Theorem A biconnected graph G with a cycle C is planar if and only if the following two conditions hold.  For each piece P of G with respect to C, the graph obtained by adding P to C is planar.  The interlacement graph of the pieces of G, with respect to C, is bipartite. The theorem above leads to a recursive algorithm.

19 Time complexity Computing pieces O(n)O(n) Construction of Interlacement graph O(n2)O(n2) Cheking bipartite graph O(n2)O(n2) Depth of recursion O(n)O(n) Overall O(n3)O(n3)

20 Linear Algorithms Hopcroft and tarjan, 1974 Booth and Lueker, 1976 Planarity testing Finding planar embedding Chiba et al, 1985 Shih and Hsu, 1992-1999

21 The circuit is not planar. How many PCB’s are required?

22 Thickness of a graph t(G) The thickness t(G) of a graph G is defined to be the smallest number of planar graphs that can be superimposed to form G.

23 Euler Theorem Let G be a connected plane graph, and let n, m, f denote respectively the number of vertices, edges and faces of G. Then For a planar graph

24 Thickness

25


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