1. ECE 720T5 Fall 2012 Cyber-Physical Systems Rodolfo Pellizzoni

2. / 30 Topic Today: OS Key traditional requirements of Real-Time OS: 1.OS Predictability 2.User Configurability 3.Reliability Additional requirement – OS should efficiently support the underlying HW platform. Especially important for multicore! Unfortunately, traditional OS design is far from predictable… 2

3. LITMUS 3

4. / 30 LITMUS Linux Testbed for Multiprocessor Scheduling in Real- Time Essentially, a soft-real time multiprocessor tested Implements a variety of different scheduling algorithm and synchronization mechanisms Many papers for different platforms… 4

5. / 30 Implementation Issues… Scheduling plug-ins Locks and Run-Queues Migration and race conditions Timers implementation Quantum implementation Run queue implementation Debugging 5

6. / 30 Other Common Issues Interrupts –In Linux, typically divided in top and bottom handler –Top (ISR): creates unpredictable interference –Bottom (kernel thread): must be properly scheduled Priority Inversions in the Kernel Virtual Memory –Paging has no concept of task priority –Global replacement decisions do not guarantee isolation I/O Scheduling –Similar to virtual memory, except the OS often has less control 6

7. / 30 Refresh: Multiprocessor Scheduling 7

8. / 30 Measured Overheads: Niagara 8

9. / 30 Results: Niagara, HR light tasks 9

10. / 30 Results: Niagara, HR medium tasks 10

11. / 30 Results: Niagara, HR heavy tasks 11

12. / 30 Results: Niagara, SR light tasks 12

13. / 30 Results: Niagara, SR medium tasks 13

14. / 30 Results: Niagara, SR heavy tasks 14

15. / 30 Other Platforms… An Empirical Comparison of Global, Partitioned, and Clustered Multiprocessor EDF Schedulers Intel Xeon, 8 sockets, 6 cores per socket (total 24 cores). LVL2 shared among 2 cores, LVL3 shared among 6 cores. Abandoned P-fair… Weighted schedulability: –D: cache-induced delay –S(U,D): percentage schedulable task sets for utilization U and cache delay D 15

16. / 30 Cache-Induced Delay, Intel 16

17. / 30 Results: Intel, SR light tasks 17

18. / 30 Results: Intel, SR medium tasks 18

19. / 30 Results: Intel, SR heavy tasks 19

20. / 30 Resource Sharing In Multicore Real-Time Synchronization on Multiprocessor: To Block or Not to Block, to Suspend or Spin? General solution adopted by the authors: –If resource is shared only by tasks within the same run- queue, use priority inheritance (GEDF) or SRP (PEDF) –If resource is shared among tasks in multiple run- queues, simply run the task non-preemptively. 20

21. / 30 Alternative? Spin-lock –Busy-waiting until you get the resource; supports FIFO ordering to prevent starvation Lock-free –Try to perform an operation on the object; if it fails, retry until success. –If multiple tasks try at the same time, at least one will succeed. Wait-free –No retry, every task succeeds after fixed number of instructions (can be large). Lock and wait-free: very dependent on data structure 21

22. / 30 Spinning is better than suspending… 22

23. / 30 … unless you care about background computation 23

24. Interrupt Management 24

25. / 30 Accounting for Interrupts An overview of interrupt accounting techniques for multiprocessor real-time systems What to get out of the paper: –Types of interrupts –Maskable / Non-maskable –Split interrupt handling –Dedicated interrupt core, timer multiplexing –… and the three ways to account (quantum, task and core-based). 25

26. / 30 Results: Niagara, HR light tasks 26

27. / 30 Results: Niagara, HR light tasks 27

28. / 30 Results: Niagara, SR light tasks 28

29. / 30 Interrupt Management – Device Interrupts What to do with Device Interrupts? Fundamental tradeoffs: –Serve the device as soon as possible – high interference on real-time tasks. –Do not serve the device – high latency/data lost. Interrupt coalescing (ex: network cards) –Buffer large amount of data on device (input) or main memory (output) –Send an interrupt only after buffers are full (input) / empty (output) 29

30. / 30 Interrupt Accounting – Device Interrupts Bottom-half can be scheduled as an aperiodic task. Top-half solutions: –Allow all ISR, bound interference (i.e., dbf) –Regulate in hw. –Regulate in sw – use a non-preemptive aperiodic server. –Ex: Non-preemptive interrupt scheduling for safe reuse of legacy drivers in real-time systems 30 UsUs 1-U s