1. Computer Science 101 Computer Systems Organization

2. Layers of Function At the most basic level, a real computer is a network of transistors One level up, these pieces are organized to form logic gates and circuits Another level up, these circuits perform arithmetic, control, and memory management functions

3. von Neumann Architecture Named for John von Neumann (1903-1957)

4. Basic Components at the System Level Memory Control Unit Arithmetic/Logic Unit Processor Input/Output Devices Stores data and programs Manages memory and executes instructions Communicate with the external world Called the von Neumann architecture, after John von Neumann (1903- 1957)von Neumann

5. Memory Consists of circuits that represent cells capable of storing N bits Each cell has –a contents, or the set of bits stored there –an address that allows the control unit to uniquely identify the cell and access its contents 11010110 1101

6. Limits of Contents Unsigned integers 2 N - 1 Sign/magnitude 2 N - 1 - 1 11111111 -2 7 - 1 = -127 11111111 2 8 - 1 = 255 Bits can also represent instructions in machine language addresses other data, such as images

7. Limits of Addresses (Address Space) 11111111 11111111 11111111 11111111 11111111 11111111 ………………… 1111 1110 1101 1100 0000 0001 N bits for each address Unsigned integers 2 N possible addresses Highest address = 15 16 cells total

8. Bits, Bytes, Etc. 8 bits1 byte 2 10 bytes1,0241 kilobyte 2 20 bytes1,048,7601 megabyte 2 30 bytes1,073,741, 8241 gigabyte 2 40 bytes1,099,511,627,7761 terabyte

9. Random Access Memory (RAM) 11111111 11111111 11111111 11111111 11111111 11111111 ………………… 1111 1110 1101 1100 0000 0001 Each cell is directly connected to the control unit so each cell is accessed in constant time

10. Memory Data Register (MDR) 11111111 11111111 11111111 11111111 11111111 11111111 ………………… 1111 1110 1101 1100 0000 0001 11111111 MDR A register is a high-speed memory cell, separate from RAM, used for a specific purpose The MDR is used to hold a datum of some kind

11. Memory Access Operations 11111111 11111111 11111111 11111111 11111111 11111111 ………………… 1111 1110 1101 1100 0000 0001 FETCH: goto the cell at address A and copy its contents into the MDR STORE: goto the cell at address A and copy the contents of the MDR into this cell 11111111 MDR FETCH STORE

12. Memory Address Register (MAR) 11111111 11111111 11111111 11111111 11111111 11111111 ………………… 1111 1110 1101 1100 0000 0001 1111 MAR The MAR holds the address of a cell in RAM The MDR is the size of a cell in RAM The MAR is the size required by the address space 11111111 MDR

13. Decoder Circuit 11111111 11111111 11111111 11111111 11111111 11111111 ………………… 1111 1110 1101 1100 0000 0001 4-to-16 decoder circuit 1111 N = 4 MAR ….. N input lines 2 N output lines

14. Decoder Circuit 11111111 11111111 11111111 11111111 11111111 11111111 ………………… 1111 1110 1101 1100 0000 0001 4-to-16 decoder circuit 1111 N = 4 MAR ….. All lines except the line designated by the input lines are off