1. Digital to Analog Converters (DAC) 2 ©Paul Godin Created March 2008

2. Building a DAC ◊DACs require an output circuit in the form of an amplifier. ◊The DACs in the following models are op-amps. ◊Op Amps typically require a positive (V DD ) and negative (V EE ) supply, and a ground reference (V SS ). DAC 2.2

3. Operational Amplifier ◊This Operational Amplifier configuration operates in this general manner: ◊Gain equals the input voltage times the ratio of the feedback resistor R f to the input resistor. V DD V EE RfRf R in DAC 2.3

4. Binary-Weighted Resistor DAC ◊The summing Op-Amp output will be the sum of the input voltages times the ratio of R f over each R in (R f /R in ). V DD V EE RfRf R in1 R in2 R in3 R in4 DAC 2.4

5. Binary-Weighted Resistor DAC ◊The first resistor has no attenuation therefore the voltage is passed. The second R has a ½ ratio so will attenuate by 50%. The 3 rd R attenuates by ¼, and the last by 1/8. ◊This is an inverting amplifier (output voltage is negative) V DD V EE 1 kΩ 2 kΩ 4 kΩ 8 kΩ DAC 2.5

6. ◊A 4-bit binary input is applied to the input resistors, with the 1 kΩ resistor considered the MSB. ◊The resistor ratio for the MSB is 1:1...if the input voltage is 5V, the value for the MSB is 5V. Binary-Weighted Resistor DAC V DD V EE 1 kΩ 2 kΩ 4 kΩ 8 kΩ MSB LSB DAC 2.6

7. Binary-Weighted R DAC - Table ◊Based on an input of 5V for the MSB, the resolution can be calculated: ◊1000 2 = 8 10, therefore each step = 5V/8 = 0.625V per step ◊Note the amplifier inverts, therefore the output voltage is negative DCBAV OUT 0000-0.000 0001-0.625 0010-1.250 0011-1.875 0100-2.500 0101-3.125 0110-3.750 0111-4.375 1000-5.000 1001-5.625 1010-6.250 1011-6.875 1100-7.500 1101-8.125 1110-8.750 1111-9.375 DAC 2.7

8. Exercise ◊Design a Binary-Weighted Resistor DAC for a 4-bit binary input. Use a 3.30 kΩ resistor for R f and a 2.20 kΩ resistor for the MSB. ◊Use EWB to analyse the circuit ◊Complete the table DCBAV OUT 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 DAC 2.8

9. Limitations ◊The Binary-Weighted DAC can be difficult to implement: ◊The resistors must be precise, otherwise the scale steps will be uneven. ◊The output of logic devices such as gates or flip-flops are not always at 5 volts and will therefore affect the scale. ◊If switches are used, pull-up resistors will affect the operation of the device. ◊Larger binary values require progressively larger resistors for the LSB. For our example: ◊5 bit = 16kΩ ◊8 bit = 128kΩ ◊12 bit = 2.048MΩ DAC 2.9

10. Conclusion ◊There are other configurations for DACs. ◊Next presentation will look at the R/2R method. DAC 2.10

11. ©Paul R. Godin prgodin ° @ gmail.com END DAC 2 DAC 2.11