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Fall 2006 1 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering Computer Organization Lecture 21 Subroutines, stack Interrupts, service.

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Presentation on theme: "Fall 2006 1 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering Computer Organization Lecture 21 Subroutines, stack Interrupts, service."— Presentation transcript:

1 Fall 2006 1 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering Computer Organization Lecture 21 Subroutines, stack Interrupts, service routines Input and output, buses

2 Fall 2006 2 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering Instruction flow Most of the time: program executes sequentially unless a branch or jump requested Sometimes –Programmer wishes to execute a subroutine, function, or method –An unusual event occurs internally or externally and the program needs to respond to it

3 Fall 2006 3 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering Subroutine flow control 1.Program prior to sub call 2.Caller transfers control to Callee 3.Callee transfers control to Caller 4.Program after sub call CallerCallee 1 2 3 4 May be nested

4 Fall 2006 4 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering Hardware for subroutines Goal –Jump to some memory location –Return back to next instruction after jump (PC- next) Requirements –Save the value of the PC-next –Modify the PC, do the jump –Restore the value of PC to PC-next

5 Fall 2006 5 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering MIPS subroutines Jump-and-link: jal –Saves PC-next in $ra –Jumps to subroutine address Jump register: jr –Jumps to address in register –jr $ra will perform return Use these to access subroutines

6 Fall 2006 6 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering Subroutine programming Call Call-next sub return Call Call-next PC = Call $ra = xx PC = sub $ra = Call-next PC = Call-next $ra = Call-next jal sub jr $ra memory

7 Fall 2006 7 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering How do we nest subroutines?

8 Fall 2006 8 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering Stack memory usage Push onto stack Pop from stack $sp points to top of stack

9 Fall 2006 9 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering Stack operations Push sub$sp, $sp, 4# push $ra on stack sw$ra, ($sp) Pop lw$ra, ($sp)# pop $ra from stack add$sp, $sp, 4 Same operations to save registers

10 Fall 2006 10 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering Unusual events Three types: all require immediate action –Internal to computer Hardware generated Software generated (OS requests) –External to computer: only hardware generated Notation –MIPS: exception = internal, interrupt = external –Common: everything is an interrupt

11 Fall 2006 11 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering Identify possible events?

12 Fall 2006 12 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering Hardware for interrupts Enable/disable: turns interrupts on and off Controller changes and response –Finish instructions (flush pipeline) –Disable interrupts –Record type of event (Cause register) –Save return address (EPC register) –Branch (vector) to specific address ( 0x8000 0180) Mechanism nearly identical to jal

13 Fall 2006 13 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering MIPS controller state diagram Two sources: bad opcode, overflow Cause register written EPC written PC written

14 Fall 2006 14 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering Interrupt request map

15 Fall 2006 15 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering Interrupt service routine Save any registers used: save state on stack Perform required action Restore registers used: restore state from stack Enable interrupts –May be done after registers saved –Provides for nested interrupts Return

16 Fall 2006 16 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering Major computer components Five classic computer components

17 Fall 2006 17 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering Computer components Input: receives information from external world Output: transmits information to external world Memory: holds programs and data Data path: physical route that carries info Control: coordinates overall flow of info

18 Fall 2006 18 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering System bus Bus interconnects system agents

19 Fall 2006 19 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering MDP16 buses Adr, Data, Control

20 Fall 2006 20 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering Early PC buses High speed Med speed Slow speed CPU’s 8080 – 80486 vintage

21 Fall 2006 21 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering Pentium 4 buses 82850 82801 300/400 MHz RDRAM DIMMS 6 Slots 100 Mbit North bridge South bridge

22 Fall 2006 22 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering System view of a computer One Agent at-a-time owns the bus ··· Signal 0 Signal n Agent 0 Agent n ··· Bus Signal 1

23 Fall 2006 23 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering Example buses?

24 Fall 2006 24 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering Bus properties Agents –Master: owns bus, issues requests –Slave: responds to requests from a master Interconnections –Parallel, serial –Point-to-point, distributed –Single- and multi-master

25 Fall 2006 25 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering Bus properties, continued. Electrical –Clocking: synchronous, asynchronous –Logic families: setup, hold, propagation –Physical: impedance, length, speed Performance –Bandwidth or data rate, B/s –Turn-around time to change masters, t

26 Fall 2006 26 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering Find B/W of MDP16 memory? CLK = 200 ns, Width = 16-bits

27 Fall 2006 27 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering

28 Fall 2006 28 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering How do we nest subroutines? Use stack pointer register ( $sp ) Push $ra onto stack upon subroutine entry Execute body of subroutine, may call other subroutines Pop $ra from stack just before subroutine exit Return from subroutine

29 Fall 2006 29 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering Identify possible events? Overflow, underflow, divide-by-zero, parity or CRC error, illegal instruction Memory or file protection (write to read- only, page fault) Real time clock, OS request Disk drive, CD, E-net: data transfer ready, or complete

30 Fall 2006 30 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering Example buses? Uart I/O Address PCI ISA S-ATA USB http://en.wikipedia.org/wiki/Computer_bus

31 Fall 2006 31 EE 333 Lillevik 333f06-l21 University of Portland School of Engineering Find B/W of MDP16 memory? CLK = 200 ns, Width = 16-bits


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