2. Async2000, April, Eilat Balsa Demonstration - 1 Balsa – Live @Eilat.fun A Hands-on Tutorial Session Doug Edwards & A. Bardsley

3. Async2000, April, Eilat Balsa Demonstration - 2 Overview of Session n Balsa for Dummies Toolkit Language Features mini examples with hand-holding n DIY Example Stack-based Calculator –compile balsa & simulate locally –generate xilinx bit stream in Manchester –run on xilinx prototyping board

4. Async2000, April, Eilat Balsa Demonstration - 3 Staff involved in Demonstration n Doug Edwards presenter n John Bainbridge demonstrator n Andrew Bardsley principal author –(in Manchester !!)

5. Async2000, April, Eilat Balsa Demonstration - 4 What is Balsa? n Language for synthesising large async circuits & systems n CSP/OCCAM background n Tangram-like based on Tangram compilation function compiles to a small (but expanding) set of handshake circuits origins: ESPRIT 6143 EXACT project

6. Async2000, April, Eilat Balsa Demonstration - 5 Handshake circuits – 1 n Circuits communicate along channels n Channels connect ports at circuit interfaces n Ports have: Type Direction Sense

7. Async2000, April, Eilat Balsa Demonstration - 6 Handshake Circuits – 2 n Port type determines the number of data wires no data wires == control only port! n Port direction is input, output or control only n Port sense Active: initiate transfers Passive: respond to requests

8. Async2000, April, Eilat Balsa Demonstration - 7 Pull Circuits – active inputs Pull Circuits: active ported circuits/ control driven req ack data cct req ack data active input port

9. Async2000, April, Eilat Balsa Demonstration - 8 Pull Circuits Pull Circuits: Circuit demands data req ack data cct req ack data

10. Async2000, April, Eilat Balsa Demonstration - 9 Pull Circuits Pull Circuits: data is supplied req ack data cct req ack data

11. Async2000, April, Eilat Balsa Demonstration - 10 Pull Circuits Pull Circuits: validity is signalled req ack data cct req ack data

12. Async2000, April, Eilat Balsa Demonstration - 11 Pull Circuits Pull Circuits: data is accepted and can then be released req ack data cct req ack data

13. Async2000, April, Eilat Balsa Demonstration - 12 Pull Circuits Pull Circuits: circuit outputs data req ack data cct req ack data

14. Async2000, April, Eilat Balsa Demonstration - 13 Pull Circuits Pull Circuits: circuit signals validity of data req ack data cct req ack data

15. Async2000, April, Eilat Balsa Demonstration - 14 Pull Circuits Pull Circuits: data is accepted req ack data cct req ack data

16. Async2000, April, Eilat Balsa Demonstration - 15 Pull Circuits Pull Circuits: data is released req ack data cct req ack data

17. Async2000, April, Eilat Balsa Demonstration - 16 Pull Circuits Pull Circuits: ack is de-asserted req ack data cct req ack data

18. Async2000, April, Eilat Balsa Demonstration - 17 Tool Overview balsa-mgr – GUI project manager balsa-md – makefile generator compilation tools simulation tools tech mapping tools utility tools

19. Design Flow

20. Async2000, April, Eilat Balsa Demonstration - 19 Compilation Tools n balsa-c compiles balsa programs to breeze includes other breeze definition files –breeze is a handshake -circuit netlist format –acts as a library format for within Balsa n balsa-netlist produces an EDIF netlist from a compiled balsa program –technology independent

21. Async2000, April, Eilat Balsa Demonstration - 20 Simulation Tools n breeze2lard produces a lard simulation file n various lard utilities mainly hidden within the Makefile by balsa-md

22. Async2000, April, Eilat Balsa Demonstration - 21 Tech Mapping Tools – 1 n Silicon back-ends Compass –used in Amulet3 DMA controller AMS 0.35 µ library within Cadence –in progress, but … SGS 0.18µ –now available

23. Async2000, April, Eilat Balsa Demonstration - 22 Tech Mapping Tools – 2 n Programmable Gate-Array back-ends balsa-pv –generates powerview schematics & symbols –uses Viewlogic tools balsa-xi –compiles design + test harness to xilinx parts –requires Xilinx tools

24. Async2000, April, Eilat Balsa Demonstration - 23 Xilinx Families Supported n xilinx 4000e (used here) runs on in-house prototyping boards not optimised, will not be supported n xilinx virtex devices future target for development targeted at commercially available boards –XSV boards from Xess corp –50K-800K gates @ $700-$1600 –2Mbyte on board ram + peripherals

25. Async2000, April, Eilat Balsa Demonstration - 24 Utilitity Tools n breeze2ps creates a ps handshake circuit graph n breeze-cost enumerates the handshake circuit used and gives an approximate area cost n balsa-md automatic Makefile maker n balsa-mgr

26. Async2000, April, Eilat Balsa Demonstration - 25 Balsa Language Features n Data types based on sequence of bits Arrays and records are bit-based Element extraction is by array slicing Strict data typing n Structural iteration n Arrayed channels n Parameterised & recursive functions

27. Async2000, April, Eilat Balsa Demonstration - 26 Balsa Language Features n Enclosed selection semantics Allows passive ported circuits Allows push (micropipeline-style) circuits Allows un-buffered (latch-free) circuits

28. Async2000, April, Eilat Balsa Demonstration - 27 Exercise 1a: Hello World Objective: understanding & compiling the simplest balsa program go to directory ~/Balsa/Buffers open file buffer1a.balsa (using your favourite editor )

29. Async2000, April, Eilat Balsa Demonstration - 28 Example: Single Place Buffer import [balsa.types.basic] public type word is 16 bits procedure buffer (input i : word; output o : word) is local variable x : word begin loop i -> x;-- Input communication o <- x-- Output communication end library mechanism visibility type declaration channel declarations procedure definition implies latch repeat forever sequential operation

30. Async2000, April, Eilat Balsa Demonstration - 29 Exercise 1b: Hello World n compile the program: balsa-c buffer1a n list the files created (examine the files if really curious)

31. Async2000, April, Eilat Balsa Demonstration - 30 Exercise 2a: 2-place buffer Objective: illustration of parallel composition & modular compilation. n specify a 2-place buffer by composing two 1-place buffers open file buffer2c.balsa

32. Async2000, April, Eilat Balsa Demonstration - 31 Code for 2-place buffer import [balsa.types.basic] import [buffer1a] public -- NB type word is declared previously procedure buffer2c (input i : word; output o : word) is local channel c : word begin buffer (?, ?) || buffer (?, ?) end reuse component buffers connected by common signal names internal channel connects two 1-place buffers internal channel connects two 1-place buffers parallel composition i c o

33. Async2000, April, Eilat Balsa Demonstration - 32 Exercise 2a: 2-place buffer edit the buffer2c.balsa to replace the ‘?’s by appropriate channel names. n compile the program: balsa-c buffer2c n create a postscript plot of the handshake circuit graph & view it breeze2ps buffer2c gv buffer2c

34. Async2000, April, Eilat Balsa Demonstration - 33 Code for 2-place buffer import [balsa.types.basic] import [buffer1a] public -- type word has been declared in buffer1a procedure buffer2c (input i : word; output o : word) is local channel c : word begin buffer (i, c) || buffer (c, o) end buffers connected by by common channel name i c o

35. Async2000, April, Eilat Balsa Demonstration - 34 Exercise 2a: H/S Circuit Graph Top Level View

36. Async2000, April, Eilat Balsa Demonstration - 35 Exercise 2b: A Flattened Circuit n Recompile the circuit & examine the handshake circuit produced: balsa-c -f buffer2c breeze2ps buffer2c gv buffer2c.ps

37. Flattened View

38. Async2000, April, Eilat Balsa Demonstration - 37 Exercise 3a: A modulo-16 Counter Objective: balsa type enforcement & simple use of balsa-md go to directory ~/Balsa/Counters open file count16a.balsa

39. Async2000, April, Eilat Balsa Demonstration - 38 Code for modulo-16 counter procedure count16 (sync aclk; output count : nibble) is local variable count_reg : nibble begin loop sync aclk ; count <- count_reg ; count_reg := ( count_reg + 1 as nibble) end await h/s on input handshake only input inc internal register cast result back to correct size then output count from internal register assign result back to internal variable internal register

40. Async2000, April, Eilat Balsa Demonstration - 39 Exercise 3b: Simulation Objective: Simple Simulation n Generate a Makefile with test-harness rules balsa-md -t count16 count16a n Examine the Makefile n Run the simulation make sim | more (terminate with Ctrl-C) procedure name generate a test harness

41. Async2000, April, Eilat Balsa Demonstration - 40 Exercise 3c: Simulation Results

42. Async2000, April, Eilat Balsa Demonstration - 41 Exercise 3d: Graphical Simulation n Objective: using the LARD channel viewer type make sim-win n run the simulation

43. Async2000, April, Eilat Balsa Demonstration - 42 Running the Simulation n Starting the simulation n Stopping the simulation

44. Async2000, April, Eilat Balsa Demonstration - 43 Lard Time View Channel values cursor sensitive messages request (red) ack (green)

45. Async2000, April, Eilat Balsa Demonstration - 44 Passive Inputs n By default, Balsa generates circuit fragments with active ports n The select statement generates circuit fragments with passive inputs select is normally a choice operator, but can be used with just a single input n What is a passive port?

46. Async2000, April, Eilat Balsa Demonstration - 45 Exercise 4a: A Passive Input Counter Objective: Generate a counter with a passive input port Open the file count16c.balsa

47. Async2000, April, Eilat Balsa Demonstration - 46 Code for Count16c procedure count16 (sync aclk; output count : nibble) is local variable count_reg : nibble begin loop select aclk then count <- count_reg ; count_reg := ( count_reg + 1 as nibble) end select usually offers a choice but also select makes aclk a passive i/p

48. Async2000, April, Eilat Balsa Demonstration - 47 Exercise 4b: Simulating the Counter n Remove the previous compilation make clean n Generate a new Makefile with a test- harness & run the simulation balsa-md -t count16 count16c make sim-win

49. Async2000, April, Eilat Balsa Demonstration - 48 enclosing handhake

50. Async2000, April, Eilat Balsa Demonstration - 49 Exercise 5a: A modulo-10 Counter Open the file count10a.balsa

51. Async2000, April, Eilat Balsa Demonstration - 50 procedure count10(sync aclk; output count: C_size) is local variable count_reg : C_size variable tmp : C_size begin loop select aclk then if count_reg /= max_count then tmp := (count_reg + 1 as C_size) else tmp := 0 end ; count <- count_reg ; count_reg := tmp end -- complete select H/S end -- loop end end Code for modulo-10 counter C_size and max_count previously declared if  then  else construct

52. Async2000, April, Eilat Balsa Demonstration - 51 Exercise 5b: A modulo-10 Counter n Modify the code so that the count value is output in parallel with updating register tmp n Compile the new description and simulate the design make clean balsa-md -t count10 count10a make sim-win

53. Async2000, April, Eilat Balsa Demonstration - 52 Modified Code procedure count10(sync aclk; output count: C_size) is local variable count_reg : C_size variable tmp : C_size begin loop select aclk then if count_reg /= max_count then tmp := (count_reg + 1 as C_size) else tmp := 0 end || count <- count_reg ; count_reg := tmp end -- complete select H/S end -- loop end end update in parallel

54. Async2000, April, Eilat Balsa Demonstration - 53 counter wraps

55. Async2000, April, Eilat Balsa Demonstration - 54 Exercise 6a: Loadable Up/Down Cntr n Modulo-10 counter choice of counting up or down counter may be loaded with a value n Input consists of bundle with control & data 4 bit data to be optionally loaded single bit determining down/up single bit determining load/count

56. Async2000, April, Eilat Balsa Demonstration - 55 Exercise 6b: Defining data types: Open file count10d.balsa n Define an enumerated type dir: type dir is enumeration down, up end n Define a type mode as an enumeration of load and count

57. Async2000, April, Eilat Balsa Demonstration - 56 Exercise 6c: Record Structure n Define a type for the input bundle as a record structure uses types previously defined type In_bundle is record ld_data : C_size ; mode : mode; dir : dir end name space separation

58. Async2000, April, Eilat Balsa Demonstration - 57 Exercise 6d: Completing the Design if in_sigs.ld_ctrl = load then count_reg := in_sigs.ld_data else case in_sigs.dir of down then-- counting down if count_reg /= 0 then tmp := (count_reg - 1 as C_size) else tmp := max_count end || count <- count_reg | up then -- counting up -- fill in this part of the choice end ; -- end case record field selector case statement record field selector choice one choice two enter code wrap count

59. Async2000, April, Eilat Balsa Demonstration - 58 Exercise 6e: Simulation from File n Can generate a simulation test-harness that associate input channels with files Examine file data n Generate test-harness & run simulation make clean balsa-md -t updown10 -D TESTOPTS “-f in_sigs data” count10d make sim-win n Ignore eof error message input channel name name of data file variable used in Makefile

60. Async2000, April, Eilat Balsa Demonstration - 59 Simulation Data {8, load, up}load the counter {0, count, up}count to 9 {0, count, up}count & wrap to 0 {0, count, up}count to 1 {0, count, down}count down to 0 {0, count, down}count down bundle record using enumerated type comments

61. Async2000, April, Eilat Balsa Demonstration - 60 symbolic names preserved

62. Async2000, April, Eilat Balsa Demonstration - 61 Exercise 7: Sharing Hardware n Balsa statements instantiate hardware repeated statements cause duplication of gates n Minimise costs by eliminating duplication: re-arrange code where possible use shared procedures

63. Async2000, April, Eilat Balsa Demonstration - 62 Sharing Hardware – Code Example Open the file count10f.balsa & browse the counter description (the same functionality as count10d.balsa ) n Note use of the shared procedure & code rearrangement n Determine the cost of this circuit make clean balsa-md count10f make cost

64. Async2000, April, Eilat Balsa Demonstration - 63 Parameterised Procedures n Facilitates libraries n Ex: buffer with parameterised width procedure Buffer ( parameter X : type ; input i : X; output o : X) is local variable x : X begin loop i -> x ; o <- x end X is of type type vars defined in terms of parameterised type

65. Async2000, April, Eilat Balsa Demonstration - 64 Using Parameterised Modules -- pbuffer1a.balsa - calling parameterised a procedure import [balsa.types.basic] import [pbuffer1] public -- instantiate a byte-wide single place buffer procedure test (input a :byte ; output b : byte) is begin Buffer over type byte of a,b end invoke a buffer of width byte

66. Async2000, April, Eilat Balsa Demonstration - 65 Recursive Procedures n Adding recursion to Balsa allows elegant specifications of many circuits n Especially useful in conjunction with parameterised procedures Go to directory ~/Balsa/Muxs Browse file pmux1.balsa

67. Async2000, April, Eilat Balsa Demonstration - 66 An n-way multiplexer n Decompose MUX:

68. Async2000, April, Eilat Balsa Demonstration - 67 An n-way multiplexer -1 -- Pmux1.balsa: A recursive parameterised MUX definition import [balsa.types.basic] public procedure PMux ( parameter X : type; parameter n : cardinal; array n of input inp : X; output out : X ) is begin -- procedure body width of input number of inputs each input is a channel output channel

69. Async2000, April, Eilat Balsa Demonstration - 68 An n-way multiplexer -2 if n = 0 then print error,”Parameter n should not be zero” | n = 1 then loop select inp[0] -> inp then out <- inp end | n = 2 then loop select inp[0] -> inp then out <- inp | inp[1] -> inp then out <- inp end when data arrives on either i/p, pass it to o/p base cases

70. Async2000, April, Eilat Balsa Demonstration - 69 An n-way multiplexer -3 else local channel out0, out1 : X constant mid = n/2 begin PMux over type X, mid of inp[0..mid-1],out0 || PMux over type X, n-mid of inp[mid..n-1],out1 || PMux over type X, 2 of {out0,out1},out end 2 internal channels two half-size muxs & one 2:1 mux

71. Async2000, April, Eilat Balsa Demonstration - 70 Simulation n 3 possibilities default lard test-harness balsa test program –balsa is flexible enough to be able to specify many test sequences custom lard test program –write your own lard

72. Async2000, April, Eilat Balsa Demonstration - 71 Using Balsa as a Test Language File test_pmux.balsa is a test-harness for testing the 5 input multiplexer n Generate a Makefile & run the simulation: balsa-md -t test test_pmux make sim-win

73. Async2000, April, Eilat Balsa Demonstration - 72 Design Example n Simple 8-bit Calculator Inputs –4 operator buttons (#, , +, -) –Hex keypad input Output –2 Line x 20 char display

74. Async2000, April, Eilat Balsa Demonstration - 73 Design Flow n Compile balsa & simulate locally n Submit design over web to Manchester Xilinx bitstream generated in Manchester using Xilinx compilation tools Xilinx bit file returned to local directory n Download & run on prototyping board 4 boards available – first come, first served

76. Async2000, April, Eilat Balsa Demonstration - 75 Design Framework Use template in Calculator/calc.balsa n Specification of calculator is up to you suggest add, subtract and push parameterised depth stack (4-8 deep) –simulate this in isolation using LARD display may be scrolled and addressed by character position (routines provided) don’t get bogged down driving the display –keep it simple for first attempt

77. Async2000, April, Eilat Balsa Demonstration - 76 Design Restrictions The top level channel declarations must not be changed because: a test harness wrapper is provided that a) provides a hardware interface to the board components b) provides a LARD interface to a model of the display hardware changing the interface will break the test harnesses provided !

78. Async2000, April, Eilat Balsa Demonstration - 77 Simulation Environment balsa source  lard code accurately reflects the balsa program lard code  model of display crafted by Andrew Bardsley specially for this event n follow the instructions in the hand-out to run the simulator automatically

79. Async2000, April, Eilat Balsa Demonstration - 78 Example Simulation n Reset Simulation Window

80. Async2000, April, Eilat Balsa Demonstration - 79 Example Simulation n Enter 1st digit press 3 acc pushed to stack

81. Async2000, April, Eilat Balsa Demonstration - 80 Example Simulation n Enter 2nd digit press 1 2nd digit entered

82. Async2000, April, Eilat Balsa Demonstration - 81 Example Simulation n Enter 45 31 pushed to stack

83. Async2000, April, Eilat Balsa Demonstration - 82 Example Simulation n Enter 17 45 pushed to stack

84. Async2000, April, Eilat Balsa Demonstration - 83 Example Simulation n Add 17+45 stack popped

85. Async2000, April, Eilat Balsa Demonstration - 84 Example Simulation n Add 5C+31 stack popped

86. Async2000, April, Eilat Balsa Demonstration - 85 Example Simulation n Reverse Subtract (0 - 8D) = 73 = -8D

87. Async2000, April, Eilat Balsa Demonstration - 86 Design of a Stack n pushes & pops are sequenced n select between input & output requests n passive input channels implied pushData popData stack n-1 stack 1 (var) stack(n)

88. Async2000, April, Eilat Balsa Demonstration - 87 Design of a Stack n decompose into buffer & stack(n-1) n connect with local channels n compose in parallel pushData popData bufferstack(n-1) stack(n)

89. Async2000, April, Eilat Balsa Demonstration - 88 Design of a Stack pushData popData bufferstack(n-1) stack(n) but can’t select output channels need to choose between incoming requests

90. Async2000, April, Eilat Balsa Demonstration - 89 Design of a stack pushData popData pop_req bufferstack(n-1) stack(n) add pop_req sync channel

91. Async2000, April, Eilat Balsa Demonstration - 90 Stack Operation - push n 1st push-data request select input from pushData pushData popData pop_req bufferstack(n-1) stack(n)

92. Async2000, April, Eilat Balsa Demonstration - 91 Stack Operation - push n 1st data item stored pushData popData stack(n-1) pop_req buffer stack(n)

93. Async2000, April, Eilat Balsa Demonstration - 92 Stack Operation - push n 2nd data item arrives pushData popData stack(n-1) pop_req buffer stack(n)

94. Async2000, April, Eilat Balsa Demonstration - 93 Stack Operation - push n push existing data pushData popData stack(n-1) pop_req buffer stack(n)

95. Async2000, April, Eilat Balsa Demonstration - 94 Stack Operation - push n push existing data pushData popData stack(n-1) pop_req buffer stack(n)

96. Async2000, April, Eilat Balsa Demonstration - 95 Stack Operation - push n buffer now free pushData popData stack(n-1) pop_req buffer stack(n)

97. Async2000, April, Eilat Balsa Demonstration - 96 Stack Operation - push n accept new data reqs ripple to bottom of stack & acks ripple back to top – performance penalty pushData popData stack(n-1) pop_req buffer stack(n)

98. Async2000, April, Eilat Balsa Demonstration - 97 Stack Operation n data pushed pushData popData stack(n-1) pop_req buffer stack(n)

99. Async2000, April, Eilat Balsa Demonstration - 98 Stack Operation - pop n 1st pop_req select pop_req pushData popData stack(n-1) pop_req buffer stack(n)

100. Async2000, April, Eilat Balsa Demonstration - 99 Stack Operation - pop n Output top-of-stack pushData popData stack(n-1) pop_req buffer stack(n)

101. Async2000, April, Eilat Balsa Demonstration - 100 Stack Operation - pop n Buffer now free pushData popData stack(n-1) pop_req buffer stack(n)

102. Async2000, April, Eilat Balsa Demonstration - 101 Stack Operation - pop n Now request pop from stack(n-1) (in parallel with requesting pop data) pushData popData stack(n-1) pop_req buffer stack(n) request read pop_request

103. Async2000, April, Eilat Balsa Demonstration - 102 Stack Operation - pop pushData popData stack(n-1) pop_req buffer stack(n)

104. Async2000, April, Eilat Balsa Demonstration - 103 Stack Operation - pop n pop completed pushData popData stack(n-1) pop_req buffer stack(n)

105. Async2000, April, Eilat Balsa Demonstration - 104 Possible Pitfalls n shared procedures: only variables and external channels allowed – not local channels can not be parameterised n reserved words e.g. in and push n remember the base case (depth = 1) in recursive stack definition

106. Async2000, April, Eilat Balsa Demonstration - 105 Source Level Debugginging n Before starting simulation, add “source- view” module

107. Async2000, April, Eilat Balsa Demonstration - 106 Source Level Debugging Use these button to control simulation Waiting for input in select Active thread

108. Async2000, April, Eilat Balsa Demonstration - 107 Balsa – Current Status n Used to implement Amulet3 DMA n Weaknesses simulation environment user-interface n Funding secured until April 2003 datapath optimisations D-I implementations (back to the future?) some language development

109. Async2000, April, Eilat Balsa Demonstration - 108 Balsa: The Complete Works

110. Async2000, April, Eilat Balsa Demonstration - 109 Push Circuits – passive inputs Push Circuits: Circuit waits for data passive input req ack data cct active output req ack data

111. Async2000, April, Eilat Balsa Demonstration - 110 Push Circuits Push Circuits: data arrives req ack data cct req ack data

112. Async2000, April, Eilat Balsa Demonstration - 111 Push Circuits Push Circuits: data validity signalled req ack data cct req ack data

113. Async2000, April, Eilat Balsa Demonstration - 112 Push Circuits Push Circuits: circuit accepts data data stored in latch req ack data cct req ack data

114. Async2000, April, Eilat Balsa Demonstration - 113 Push Circuits Push Circuits: circuit signals data taken req ack data cct req ack data

115. Async2000, April, Eilat Balsa Demonstration - 114 Push Circuits Push Circuits: Circuit outputs data req ack data cct req ack data

116. Async2000, April, Eilat Balsa Demonstration - 115 Push Circuits Push Circuits: Circuit signals validity req ack data cct req ack data

117. Async2000, April, Eilat Balsa Demonstration - 116 Push Circuits Push Circuits: receiver takes data req ack data cct req ack data

118. Async2000, April, Eilat Balsa Demonstration - 117 Enclosed Handshakes Push Circuits: data arrives req ack data cct req ack data

119. Async2000, April, Eilat Balsa Demonstration - 118 Enclosed Handshakes Push Circuits: data validity signalled req ack data cct req ack data

120. Async2000, April, Eilat Balsa Demonstration - 119 Enclosed Handshakes Push Circuits: circuit accepts data req ack data cct req ack data

121. Async2000, April, Eilat Balsa Demonstration - 120 Enclosed Handshakes Push Circuits: Circuit outputs data req ack data cct req ack data

122. Async2000, April, Eilat Balsa Demonstration - 121 Enclosed Handshakes Push Circuits: Circuit signals validity req ack data cct req ack data

123. Async2000, April, Eilat Balsa Demonstration - 122 Enclosed Handshakes Push Circuits: receiver takes data req ack data cct req ack data

124. Async2000, April, Eilat Balsa Demonstration - 123 Enclosed Handshakes Push Circuits: input handshake completes No latch required req ack data cct req ack data