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LLRF-05 Oct.10,20051 Digital LLRF feedback control system for the J-PARC linac Shin MICHIZONO KEK, High Energy Accelerator Research Organization (JAPAN)

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Presentation on theme: "LLRF-05 Oct.10,20051 Digital LLRF feedback control system for the J-PARC linac Shin MICHIZONO KEK, High Energy Accelerator Research Organization (JAPAN)"— Presentation transcript:

1 LLRF-05 Oct.10,20051 Digital LLRF feedback control system for the J-PARC linac Shin MICHIZONO KEK, High Energy Accelerator Research Organization (JAPAN) J-PARC linac LLRF system FPGA based Digital FB system Performance During rf pulse Tuner control Running Beam compensation

2 LLRF-05 Oct.10,20052 What’s J-PARC?  frontier science in particle physics  nuclear physics, materials science  life science and nuclear technology J-PARC:Japan Proton Accelerator Research Complex

3 LLRF-05 Oct.10,20053  190 MeV normal conducting proton linac  Operation frequency: 324 MHz  Total 19 klystrons (max.3 MW)  RF flat top: 650 us  Requirements of cavity electric field stability +-1 % (amplitude), +-1deg. (phase) LLRF requirements Klystron gallery Total 19 klystrons drive cavities

4 LLRF-05 Oct.10,20054 Digital LLRF feedback control system for the J-PARC linac Shin MICHIZONO KEK, High Energy Accelerator Research Organization (JAPAN) J-PARC linac LLRF system Performance During rf pulse Tuner control Running Beam compensation

5 LLRF-05 Oct.10,20055 J-PARC LLRF system cPCI digital FB system generates LLRF signal (12 MHz, 48 MHz, 312 MHz and 324 MHz) delivers I/Q modulated rf signals to 2 cavities recieves rf signals from cavities and down-converts to IF Fast hardwire interlock is connected to Pulse Modulator (outside cPCI). Analog fast FB will be used for klystron FB loop. Cavity-tuners are controlled from cPCI by way of PLC. EPICS LLRF PLC cPCI FB system

6 LLRF-05 Oct.10,20056 cPCI digital FB system CPU I/O DSP/FPGA Mixer&I/Q RF&CLK Digital Analog  2-FPGAs (2x VirtexII 2000) are installed with 4x14bit-ADCs and4x14bit-DACs at 48 MHz sampling  DSP board enables to calculate complex diagnostics such as cavity control.  FPGAs are used only for fast feedback. cPCI is adopted for the crate. FPGA based digital FB system FPGA: Mezzanine card of the commercial DSP board

7 LLRF-05 Oct.10,20057 FB algorism IF signals are directly read by ADCs. The separated IQ signals are compared with set-tables and PI control is made with FF. RF : 324MH z LO : 312MH z IF : 12MH z Sampling:48MH z

8 LLRF-05 Oct.10,20058 Digital LLRF feedback control system for the J-PARC linac Shin MICHIZONO KEK, High Energy Accelerator Research Organization (JAPAN) J-PARC linac LLRF system Performance During rf pulse Tuner control Running Beam compensation

9 LLRF-05 Oct.10,20059 Vector Sum Control Agrees well with simulation Amplitude:6,000 and Phase 0 deg. (I=6,000, Q=0) Vector sum control Set table is exponential function

10 LLRF-05 Oct.10,200510 External monitor External monitors are assembled with commercial fast FPGA board. The amplitude and phase stability is +-0.15 %,+-0.15deg. Xtreme DSP board by Xilinx (commercial FPGA board with 66 MHz ADCs)

11 LLRF-05 Oct.10,200511

12 LLRF-05 Oct.10,200512 FB stability Set value:6,000->5,000->4,000 With same FB parameters. FB works well with the amplitude variation of >20%.

13 LLRF-05 Oct.10,200513 Digital LLRF feedback control system for the J-PARC linac Shin MICHIZONO KEK, High Energy Accelerator Research Organization (JAPAN) J-PARC linac LLRF system Performance During rf pulse Tuner control Running Beam compensation

14 LLRF-05 Oct.10,200514 Tuner control A klystron drives 2 cavities. ADC_1,2:cavity field monitors ADC_3,4:cavity input monitors Detuning is calculated from the difference between input and cavity by DSP. -> Tuner control is carried out by DSP. >1deg. Detuning, tuner control starts. Stop tuning control when the detuning becomes <0.2deg. Vector sum is stable even with 15 deg. detuning. Needs < 2 min. for control

15 LLRF-05 Oct.10,200515 Digital LLRF feedback control system for the J-PARC linac Shin MICHIZONO KEK, High Energy Accelerator Research Organization (JAPAN) J-PARC linac LLRF system Performance During rf pulse Tuner control Running Beam compensation

16 LLRF-05 Oct.10,200516 Running data of J-PARC LLRF Quite stable The trend of the average amplitude and phase (drift) The small drifts (<.2%,.2 deg. ) are caused by the temperature dependence of the rf circuits. These will disappear at the new version. Internal monitor External monitor Cavity 1 Cavity 2 Vector sum ±0.5 度 ±0.5 %

17 LLRF-05 Oct.10,200517 Digital LLRF feedback control system for the J- PARC linac Shin MICHIZONO KEK, High Energy Accelerator Research Organization (JAPAN) J-PARC linac LLRF system Performance During rf pulse Tuner control Running Beam compensation

18 LLRF-05 Oct.10,200518 Beam loading test Beam loading observed at FB monitor Beam loading Beam gate signal modulate the rf -> beam loading

19 LLRF-05 Oct.10,200519 Beam loading test (cont.) Only FB FB+ beam compensation FF +-5% beam +-2deg. beam +-0.5% +-0.5deg. Beam can be compensated with FF within +-0.3%,+-.15 deg.

20 LLRF-05 Oct.10,200520 Stability of <+-0.15%, +-0.15deg. is obtained during rf pulse with a SDTL test module. Tuner control works well even from 15 deg. detuning position. Eighteen hours running show good stability. Beam loading test box enables to test the beam loading effects and the stability is ~+-0.3%, +-0.15deg. during beam pulse. Linac commissioning will start from June 2006. Summary

21 LLRF-05 Oct.10,200521 Test cavity Ql=6,800 Test cavity is quite useful for developing FB algorism. Test cavity Step response

22 LLRF-05 Oct.10,200522 Tuner control (1) Start: |error-set| > 3 deg. Goal: |error-set| < 0.2 deg. 324 MHz  Cavity tuner: Response ~100-500 ms  Communication between LLRF PLC and DSP: every 2 sec. (100 ms during tuner control)  Cavity input phase -> measured through FPGA2  Cavity phase -> measured through FPGA1  Phase error : calculated at DSP  If the detuning phase is far from set-phase  DSP will change the tuner through PLC until the detuning phase to be proper.

23 LLRF-05 Oct.10,200523 Tuner control (2)  Compare rf phase between cavity-input and cavity. (->detuning)  Cavity tuner is controlled when the detuning is larger than set value (> 3 degree for common error and 1degree for relative error) Absolute error (common error < ±3deg.) NG OK Good OK NG -3 -0.2 0 +0.2 +3 (deg.) Tuner 1 (Δ1 ) (stop) move (control start) Tuner 2 (Δ2 ) (control start) move (stop) Relative error (Δ1-Δ2 ) (relative error < ±1deg.) Δ1-Δ2 -1 -0.2 0 +0.2 +1 (deg.) (control start) move (stop)

24 LLRF-05 Oct.10,200524 Calibration Amplitude in detector output is calibrated by comparing with FB monitor and detector monitor.


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