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Process Scheduling III ( 5.4, 5.7) CPE 261403 - Operating Systems

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Presentation on theme: "Process Scheduling III ( 5.4, 5.7) CPE 261403 - Operating Systems"— Presentation transcript:

1 Process Scheduling III ( 5.4, 5.7) CPE 261403 - Operating Systems http://www.e-cpe.org/moodle

2 Multiple-Processor Scheduling (5.4)

3 Asymmetric vs Symmetric Processing

4 Asymmetric Multiprocessing http://www.jillako.com/weblog/labels/Opinion.html Cell Processor

5 The Cell Processor http://www.ps3station.com/cell.php

6 EIB – A Ring Bus Topology PPE SPE Supports concurrent transmissions

7 How the OS can manage the Cell PPE SPE PPE SPE … Job QueueStream Processing

8 Job Queue vs Stream Processing

9 Symmetric Multiprocessing (SMP) http://www.wiseproduct.com/

10 The Xenon Processor http://arstechnica.com/articles/paedia/cpu/xbox360-2.ars/2 Xenon is actually a modified PPE unit of the Cell Processor. IBM designed it for Microsoft.

11 Broadway CPU Single Core 729 MHz http://www.wikipedia.org, http://www.reghardware.co.uk/2007/07/20/wii_tops_3m_in_japan/

12 http://www.intel.com

13 4-Way SMP http://www.jeffooi.com/2006/11/quad_core_welcome_to_the_era_o.php

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15 http://www.geocities.com/amd_info/

16 http://www.amd.com

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19 Has 750 Million Transistors How does 750 million objects look like?

20 Garth Brooks in Central Park New York, 1997

21 750,000 Viewers

22 Biggest Concert in History?

23 Rod Stewart

24 3,500,000 Viewers

25 Symmetric Multithreading (SMT) Hyperthreading

26 SMT Architecture Figure 5.8 Each logical CPU has: - Its own registers - Can handle interrupts Similar to Virtual Machines but done at the HW level

27 CPU Affinity (proc staying at one processor) CORE 1CORE 2 Cache Main Memory Soft Affinity – Process may be migrated to a different processor Hard Affinity – Process is locked to one processor

28 Load Balancing: Push Migration CORE 1CORE 2 Ready Queue 1Ready Queue 2 Kernel Check load Push Migration

29 Load Balancing: Pull Migration CORE 1CORE 2 Ready Queue 1Ready Queue 2 Kernel Notify queue empty Pull Migration

30 CPU 0 Scheduling Domains in the Linux Kernel (v 2.6.7 and later) Core 0 Core 1 CPU 1 Core 0 Core 1 Sched Level 0 Level 1 Level 2 Load Balance Load Balance Load Balance Takes CPU Affinity into consideration. It tries to migrate only in the same group

31 Benefits of Scheduling Domain Keep migration local when possible. Less cache-miss. Can optimize for power saving mode. Schedule only for one domain when possible.

32 Future trend of Multi-CPU Processors? AMP Asymmetric Multi-Processing Few High-speed Serial Core + Many Slower Parallel Cores

33 The Cell Processor http://www.ps3station.com/cell.php PPE – Serial Core SPE – Parallel Cores

34 Turbo Boost Technology (Intel) Core i5, i7 Processors 3-4 Cores 2.26 GHz 2 Cores 3.06 GHz 1 Cores 3.2 GHz Can turn on/off any core and adjust the speed Parallel TasksSequential Tasks

35 Scheduling for AMP Performance Asymmetry Handling High Number of Cores

36 Example of Performance Asymmetry Core 0 Core 1 Core 2 Core 3 Performance Index = 2 PI = 1 Scaled Load – Core 0’s ready queue should be twice as long

37 Handling High Number of Cores None Pre-emptive - Less need to share CPU - Save context switch time Smart Barrier - A thread can tell the OS what resources it is waiting for - OS does not need to schedule the thread until the resources are ready

38 Job 0 Printf() OS Job 1 Job 2 Message: Waiting for the display

39 Parallel Processing Exercise 12345678 910111213141516 1718192021222324 2526272829303132 3334353637383940 4142434445464748 4950515253545556 5758596061626364 1. New Data [ x, y] = Old Data [x, y] ^ 2 2. New Data [ x, y] = (D [x, y] + D [x-1, y] + D [x+1, y] + D [x, y-1] + D [x, y+1]) / 5


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