1. Data Acquisition System of SVD2.0 This series of slides explains how we take normal, calibration and system test data of the SVD 2.0 and monitor the environment of the detector. The first step for constructing the full read out system is to have agreement about how to transfer control messages and obtained data among experts who are in charge of each component. The SVD2.0 DAQ system consists of Power supply (PS), Trigger Timing Modules (TTM), Flash ADC system (FADC) and a PC farm which reads the digitalized data from FADC. Each component accompanies a PC or a Sparc CPU board (the PC farm is PCs itself), on which a process (or processes) is running. We call the processes “ slaves ” hereafter. There is a master process running on a PC connected via NSM with the slaves and CDAQ. This special process is called Higuchi Daemon (HD), since Higuchi-san will create it. The framework of the overall system was discussed on Sep.4 th, 2002 and almost fixed. From the next slide, the functions of each component will be explained. 2002/9/6 H.Ishino

2. Receive control messages from CDAQ to turn on/off HV and to start/stop run. Monitor the SVD environment via NSM. Send control messages to the slaves to turn on/off HV and start/stop run. Play a roll as an interlock. –If HD finds a problem with the monitored data, it will deal with the problem adequately. (for example, if it finds an abnormal increase of temperature on LEBO, it will send a message to HV monitor to turn off HV and ignore a message from CDAQ which requests to switch on HV.) Send control messages to TTM process to start calibration local run. Higuchi Daemon (HD)

3. Receive a message from HD and turn on/off HV and LV according to the request. Monitor HV and LV currents and so on and write the monitored data to the NSM data space. HV control/monitor

4. Receive messages from HD and manipulate TTM hardware to start/stop run. Receive messages from HD to start and control calibration run. Monitor the environment of the core system and write the obtained data to NSM data space. TTM control

5. Receive a message from HD which requests to stop run and write threshold data for L1.5 trigger to the register. Monitor something (TA count rate?, I ’ m not sure … ) and write the obtained data to NSM data space. FADC control

6. Receive messages from HD to start/stop run. When a request for stopping run comes, the PC farm will write down Pedestal and Noise value of each strip to a file on its local disk, which will be referred by the FADC sparc CPU board later. Read data from FADC and send it to the Event Builder after sparsification and reformatting. Read monitor data from NSM data space and add the information to the reformatted data periodically. In case of calibration run, it will write FADC data onto its local hard disk with transparent mode (or calculate noise and pedestal simultaneously by an option). PC farm

7. Collect data from the PC farm, build events and translate it to the basf format. The control messages, like requests for starting/stopping run, come from CDAQ. Event Builder

8. From the next slides, schematic views of the read out system are shown for each run mode case.

9. Si ladder core Power supply TTM FADC PC Sparc PC farm ADC data control monitor control monitor control monitor L1.5 data via NFS Evb CDAQ Higuchi Daemon data Monitor data Run start/stop HV on/off Normal run

10. Si ladder core Power supply TTM FADC PC Sparc PC farm ADC data control monitor control monitor control monitor L1.5 data via NFS Evb CDAQ Higuchi Daemon data Monitor data Calibration Run start/stop HV on/off Calibration run HD

11. Si ladder core Power supply TTM FADC PC Sparc PC farm ADC data control monitor control monitor control monitor L1.5 data via NFS Local Evb CDAQ Higuchi Daemon data Monitor data System test Run start/stop HV on/off System test

12. Toward to the system test Taking SVD data in the full system test which is planned to start on Oct, 2002 is the first goal to complete the SVD2.0 DAQ system. For the system test, the things we have to do are as follows, HD, PS, TTM, FADC and PC farm processes should have the functions mentioned above. The run control for the SVD local run may has to be made. Local Event builder has to be made. DQM (data quality monitor) may be need. Basic offline software (especially cal-svd) has to be prepared for analysis. The man assignment for achieving the above jobs are shown in the next page. Those jobs must be completed by the end of Sep.

13. HD (Higuchi). PS (Tsuboyama) (almost completed except NSM part(?)) TTM (Harada/Kawasaki). FADC (Karawatzki/Mori). PC farm (Ishino/Igarashi/Yamashita) Local Event builder (Yamashita) DQM (Okuno) (may not be urgent)