1. Acknowledged to: Shahrul Ashikin Azmi (PPKSE)

2. Objectives  Explain the operation and characteristics of junction field effect transistors (JFET).  Understand JFET parameters  Explain the operation and characteristics of metal oxide semiconductor field effect transistors (MOSFET)  Discuss and analyze how MOSFET are biased  Troubleshoot FET circuits.  Discuss and analyze how JFETs are biased

3. Introduction FET – a three-terminal voltage-controlled device used in amplification and switching application. Field effect transistors controls current by voltage applied to the gate. The FET’s major advantage over the BJT is high input resistance. 2 basic type of FET: JFET and MOSFET

4. JFET The junction field effect transistor, like a BJT, controls current flow. The difference is the way this is accomplished. The JFET uses voltage to control the current flow. As you will recall the transistor uses current flow through the base- emitter junction to control current. JFETs can be used as an amplifier just like the BJT. V GG voltage levels control current flow in theV DD, R D circuit.

5. JFET The terminals of a JFET are the source, gate, and drain. A JFET can be either p channel or n channel.

6. JFET V DD provide a drain-to-source voltage. V GG sets the reverse-bias voltage between gate and source. JFET is always operated with gate-source pn junction reverse- biased. Reverse-biasing of the gate-source junction with a –ve gate voltage produces a depletion region along pn junction.

7. JFET Biasing Gate-to-source junction of JFET always reverse- biased under normal condition. Gate-to-source junction never allowed to become forward-biased because the gate material is not designed to handle any significant amount of current  may destroy the component. The fact gate is always reverse-biased leads to important feature  JFET has high gate input impedance; typically in high megaohm range. This feature result to JFET extensively being used in integrated circuits. Low current draw helps IC remain cool, thus allowing more components to be placed in a smaller physical area.

8. JFET Characteristics and Parameters Let’s first take a look at the effects with a V GS of 0V. This is produced by shorting the gate to source junction.

9. JFET Drain Curve

10. Refer to JFET drain curve from point A to B, I D increases proportionally with increases of V DD (V DS increases as V DD increases). This is called the ohmic region (point A to B) because V DS and I D are related by Ohm’s Law. At point B, the curve levels off and I D becomes constant. The point when I D ceases to increase regardless of V DD increases is called the pinch-off voltage, V P (point B). This current is called maximum drain current (I DSS ) and always specified for the condition, V GS =0V. This area is called constant-current area. Breakdown (point C) occur when I D begins to increase rapidly with any increase in V DS. This of course undesirable, so JFETs operation is always well below this value.

11. JFET Characteristics and Parameters

12. From this set of curves you can see with increased voltage applied to the gate, I D decrease and JFET reaches pinch-off at values of V DS less than V P.

13. JFET Characteristics and Parameters

14. We know that as V GS is increased I D will decrease. The point that I D ceases increase is called cutoff. The amount of V GS required to do this is called the cutoff voltage (V GS(off ) ). The more negative V GS, the smaller I D becomes. When V GS has sufficiently large negative value, I D is reduced to zero. It is interesting to note that pinch-off voltage (V p ) and cutoff voltage (V GS(off) ) are both the same value only opposite polarity.

15. JFET Transfer Characteristic For n-channel JFET, V GS(off) is negative and for p- channel, V GS(off) is positive. Bottom end of the curve is at a point on V GS axis equal to V GS(off) and the top end of the curve is at a point on I D axis equal to I DSS (shorted-gate drain current rating of the device). The operating limits of JFET are: I D =0when V GS =V GS(off) I D =I DSS when V GS = 0 Transfer characteristic curve can be developed from drain characteristic curves by plotting values of I D for the values of V GS taken from the family of drain curves at pinch-off.

16. JFET Characteristics and Parameters The transfer characteristic curve illustrates the control V GS has on I D from cutoff (V GS(off) ) to pinchoff (V P ). Note the parabolic shape. The formula below can be used to determine drain current. All these values are usually available from data sheet. I D = I DSS (1 - V GS /V GS(off) ) 2

17. Normal Biasing

18. JFET Characteristics and Parameters Forward transfer conductance, g m of JFETs is sometimes considered. It is the changes in I D based on changes in V GS with V DS is constant. Input resistance for a JFET is high since the gate -source junction is reverse biased, however the capacitive effects can offset this advantage particularly at high frequencies. The value is larger at the top of the curve (near V GS =0) but become smaller as you increase V GS (near V GS(off) ).

19. Transconductance

20. Forward transfer conductance referred to as g m = ∆I D /∆V GS. At V GS =0, the parameter is known as minimum transfer conductance, g mo and can be calculated using this equation: g mo = 2I DSS /|V GS(off) | and g m = g mo (1 - V GS /V GS(off) ) g mo can be read from the datasheet as g fs or y fs and sometimes written as Forward Transfer Admittance.

21. JFET Input Resistance Since JFET is reverse-biased for operation, its input resistance becomes so large. This is an advantage of using JFET. Looking at the datasheet, you may calculate the resistance value by using the Gate Reverse Current I GSS. This internal input resistance can be calculated at different V GS : R IN =|V GS /I GSS | As I GSS increases with temperature, R IN will decrease.

22. JFET Input Resistance Example 1: Calculate R IN if I GSS =-2nA and V GS =-20V Solution: R IN =|V GS /I GSS |=|-20/-2n|=10G 

23. JFET Biasing Circuit Just as we learned that the bi-polar junction transistor must be biased for proper operation, the JFET also must be biased for operation. Let’s look at some of the methods for biasing JFETs. In most cases the ideal Q-point will be the middle of the transfer characteristic curve which is about half of the I DSS. 4 types of bias method are self-bias, gate-bias, voltage- divider bias and current-source bias.

24. JFET Biasing- Self bias Self-bias is the most common type of biasing method for JFETs. Notice there is no voltage applied to the gate, V G =0V. However, the voltage from gate to source (V GS ) will be negative for n channel and positive for p channel to keep the junction reverse biased. Uses a source resistor to help reverse biase JFET gate. The gate is returned to ground via R G, and R S has been added to source circuit. This voltage can be determined using the formulas below. I D = I S for all JFET circuits. V G =0 and V S =I D R S. V GS = V G - V S (n channel) V GS = 0-I D R S = -I D R S (p channel) V GS = 0-(-I D R S )=I D R S

25. JFET Biasing- Self bias

26. JFET Biasing – self bias Keep in mind that analysis of p-channel is the same as n- channel except for opposite polarity voltages. The drain voltage with respect to ground is: V D = V DD – I D R D Since V S = I D R S, V DS is: V DS = V D – V S = V DD – I D (R D +R S )

27. JFET Biasing-self bias Setting the Q-point requires us to determine a value of R S that will give us the desired I D and V GS. The formula below shows the relationship. R S = | V GS /I D | For a desired value of V GS, I D can be determined from the either the transfer characteristic curve or more practically from the formula below. The data sheet provides the I DSS and V GS(off). I D = I DSS (1 - V GS /V GS(off) ) 2

28. JFET Biasing-self bias Midpoint biasing- desirable to bias a JFET near the midpoint of its transfer characteristic curve where I D =I DSS / 2. I D is approximately one-half of I DSS when: V GS  V GS(off) /3.4

29. JFET Biasing-self-bias The value of R S needed to establish V GS can be determined by the relationship below. R S = | V GS /I D | To set the drain voltage at midpoint (VD=VDD/2), select a value of R D to produce the desired voltage drop. The value of R D needed can be determined by taking half of V DD and dividing it by I D. R D = (V DD /2)/I D

30. JFET Biasing- self-bias Remember the purpose of biasing is to set a dc operating point (Q-point). In a self-biasing type JFET circuit, the Q-point is determined by the given parameters of the JFET itself and values of R S and R D. Setting it at midpoint on the drain curve is most common. One thing not mentioned in the discussion is R G. It’s value is arbitrary large to prevent loading on the driving stage in a cascaded amplifier arrangement.

31. JFET Biasing-graphical The transfer characteristic curve along with other parameters can be used to determine the mid-point bias Q-point of a self- biased JFET circuit. First, establish dc load line by calculating V GS. V GS = -I D R S for I D =0 and I D =I DSS With 2 points (I D =0 and I D =I DSS ), draw dc load line on the transfer characteristic curve. The point where the two lines intersect gives us the I D and V GS (Q-point) needed for mid-point bias. Note that load line extends from V GS(off) (I D = 0A) to V P (I D = I DSS )

32. JFET Biasing

33. JFET Biasing- gate-bias

34. JFET Biasing – gate-bias Gate supply voltage (-V GG ) is used to ensure gate-to- source junction is reverse-biased. Since there is no gate current, there is no voltage dropped across R G. So, V GS = -V GG. RG  to prevent input signal from being shorted to gate supply through low reactance of input coupling capacitor. To find I D, use I D = I DSS (1 - V GS /V GS(off) ) 2 V DS = V DD – I D R D Diadvantage: Gate bias does not provide a stable Q- point value of I D from one JFET to another.

35. JFET Biasing- voltage divider bias Voltage-divider bias can also be used to bias a JFET. R 1 and R 2 are used to keep the gate-source junction in reverse bias. Operation is no different from self-bias. Determining V GS for a JFET voltage-divider circuit with givenV D can be calculated with the formulas below. Source voltage,V S = I D R S Gate voltage, V G =(R 2 /R 1 +R 2 )V DD Gate-to-source voltage.V GS =V G –V S Source voltage, V S = V G - V GS

36. JFET Biasing- voltage-divider bias V S must be more +ve than V G in order to keep V GS reverse-biased (-ve value). Drain current, I D = (V DD – V D )/R D or Since I D =I S, then I D =V S /R S

37. JFET Biasing-graphical In using the transfer characteristic curve to determine the approximate Q-point we must establish the two points for the load line. The first point is I D = 0 and V GS =V G. V S =I D R S =(0)R S =0V V GS =V G -V S =V G -0=V G For V GS =0, I D =(V G -V GS ) / R S = V G / R S The second point is I D =V G / R S and V GS =0.

38. The point at which the load line intersect with transfer characteristic curve is Q-point. Dc load line for JFET with voltage-divider bias

39. JFET Biasing – Current Source Bias Current source bias  provides high Q-point stability by making value of I D independently of JFET. From figure, JFET drain current equals BJT collector current. I DQ = I C The value of IC is less than the lowest value of I DSS for JFET. Assume JFET in the figure has a value of I DSS =5- 12mA, so as long as I C < 5mA, value of I DQ is independently of JFET itself. Advantage: provide the most stable Q-point value of I D. Disadvantage: circuit complexity makes it undesirable for most applications.

40. JFET Biasing- Current source bias

41. JFET Biasing Transfer characteristics can vary for JFETs of the same type. This would adversely affect the Q- point for self-bias analysis. Q-point is much more stable using voltage-divider bias and current source bias.

42. MOSFET The metal oxide semiconductor field effect transistor (MOSFET) is the second category of FETs. The difference is that there no pn junction structure instead gate of MOSFET is insulated from the channel by silicon dioxide layer. MOSFETs are static sensitive devices and must be handled by appropriate means. There are depletion MOSFETs (D-MOSFET) and enhancement MOSFETs (E-MOSFET). Note the difference in construction. The E-MOSFET has no structural channel.

43. D-MOSFET The D-MOSFET can be operated in depletion or enhancement modes. To be operated in depletion mode, a negative gate-to-source voltage is applied. With negative gate voltage, negative charges on the gate repel electrons from channel, leaving +ve ions in their place. N-channel is depleted of some electron, thus decreasing channel conductivity.

44. D-MOSFET To be operated in the enhancement mode the gate-to-source is made more positive, attracting more electrons into the channel for better current flow and thus enhancing the channel conductivity. Remember we are using n channel MOSFETs for discussion purposes. For p channel MOSFETs, polarities would change.

45. E-MOSFET The E-MOSFET or enhancement MOSFET can operate in only the enhancement mode. With a positive voltage above a threshold value on the gate, an induced channel of thin layer of –ve charges is created. The conductivity of channel is enhanced by increase VGS and thus pulling more electrons into channel area.

46. POWER MOSFET The lateral double diffused MOSFET (LDMOSFET) and the V- groove MOSFET (VMOSFET) are specifically designed for high power applications. LDMOSFET VMOSFET

47. POWER MOSFET Dual gate MOSFETs have two gates which helps control unwanted capacitive effects at high frequencies.

48. MOSFET Characteristics and Parameters Since most of the characteristics and parameters of MOSFETs are the same as JFETs we will cover only the key differences.

49. D-MOSFET Characteristics and Parameters The D-MOSFET operate in either +ve or –ve gate voltages. The point on the curves where VGS=0 corresponds to IDSS. The point where ID=0 corresponds to VGS(off). As with JFET, VGS(off)=-V P. The equation to find drain current also the same as JFET: I D = I DSS (1 - V GS /V GS(off) ) 2 Remember n and p channel polarity differences.

50. Example 7-13 For a certain D-MOSFET, IDSS=10mA and VGS(off)=-8V. a) Is this n-channel or a p-channel? b) Calculate ID at VGS=-3V. c) Calculate ID at VGS=+3V. Solution: a) The device has a –ve VGS(off), this is an n-channel MOSFET. b) ID=IDSS(1-VGS/VGS(off)) 2 =(10mA)(1- (-3/-8)) 2 =3.91mA c) ID=(10mA)(1- (+3/-8)) 2 =18.9mA

51. E-MOSFET Characteristics and Parameters The E-MOSFET for all practical purposes does not conduct until V GS reaches the threshold voltage (V GS(th) ). I D when conducting can be determined by the formulas below. The constant K must first be determined from data sheet by taking I D(on) at any given value of VGS on a particular MOSFET. K = I D(on) /(V GS - V GS(th) ) 2 I D = K(V GS - V GS(th)) 2

52. MOSFET Biasing- zero bias The three ways to bias a MOSFET are zero-bias, voltage-divider bias, and drain-feedback bias. For D-MOSFET zero biasing as the name implies has no applied bias voltage to the gate. The input voltage swings it into depletion and enhancement mode.

53. Zero bias Since V GS =0 and I D =I DSS, the drain-to-source voltage is: V DS = V DD – I DSS R D The purpose of R G is to accommodate ac signal input by isolating it from ground as shown in figure (b) above. Since there is no dc gate current, R G does not affect the zero gate-to-source bias.

54. MOSFET Biasing- voltage divider bias For E-MOSFETs zero biasing cannot be used. Voltage-divider bias must be used to set the V GS greater than the threshold voltage (V GS(th) ). I D can be determined as follows. To determine V GS, normal voltage divider methods can be used. The following formula can be applied. V GS = (R 2 / (R 1 +R 2 ))V DD V DS = V DD - I D R D K = I D(on)/ (V GS - V GS(th) ) 2 I D = K(V GS -V GS(th) ) 2 V DS can be determined by application of Ohm’s law and Kirchhoff’s voltage law to the drain circuit.

55. Example 7-16 Determine VGS and VDS for E-MOSFET circuit below. Assume MOSFET has minimum values of ID(on)=200mA at VGS=4V and VGS(th)=2V.

56. Solution example 7-16

57. MOSFET Biasing- drain feedback bias With drain-feedback bias there is no voltage drop across R G making V GS = V DS. With V GS given determining I D can be accomplished by the formula below. I D = (V DD – V DS )/R D

58. Troubleshooting As always, having a thorough knowledge of the devices makes for easier troubleshooting circuits utilizing them. We will discuss some the common faults associated with FET circuits. Experience in troubleshooting is the best teacher having basic theoretical knowledge is extremely helpful.

59. Troubleshooting If V D = V DD in a self-biased JFET circuit it could be one of several opens. It is a clear indication of no drain current. Use of senses to check for obvious failures the first and easiest step. Replace the FET only if associated components are known to be good. If V D is less than normal in a self-biased JFET circuit an open in the gate circuit is more than likely the problem. The low drain voltage would be indicative of more drain current flowing than normal.

60. Troubleshooting In a zero-biased D-MOSFET or drain-feedback biased E-MOSFET an open in the gate circuit is more difficult to detect. It may seem to be biased properly with dc voltages but will fail to work properly when an ac signal is applied.

61. Troubleshooting With a voltage-divider biased E-MOSFET circuit faults are more easily detected. With an open R 1 there is no drain current, so the V D = V DD. With an open R 2 full V DD is applied to the gate turning it on fully. V D = 0

62. Summary  JFETs are unipolar devices.  JFETs have three terminals: Source, Gate, and Drain.  JFETs have a high input resistance since the gate- source junction is reverse biased.  IDSS for all FETs is the maximum amount of current flow in the drain circuit when V GS is 0V.  All FETs must be biased for proper operation. Midpoint is most common for use in amplifiers.  Unwanted capacitance associated with FETs can be dealt with by using dual gate type FETs.

63. Summary  E-MOSFETs have no physical channel. A channel is induced with V GS greater than V GS(th).  There are special MOSFET designs for high power applications.  E-MOSFETs have no I DSS parameter.  MOSFETs differ in construction in that the gate is insulated from the channel.  D-MOSFETs can operate in both depletion and enhancement modes. E-MOSFETs can only operate in the enhancement mode.