1. 1 PSP Family of Compact Models Overview and Recent Developments MOS-AK December 13 th, 2008 G. Gildenblat, W. Wu, X. Li, Z. Zhu, W. Yao, Q. Zhou, G. Dessai, and A. Dey G.D.J. Smit, A.J. Scholten, and D.B.M. Klaassen

2. 2 Outline  PSP project overview  Introduction to bulk PSP  Recent developments in bulk PSP  PSP-SOI  PSP-MGFET  Conclusions MOSFET characteristics shown in this presentation are from Philips/NXP, Freescale and IBM (presented with permission) Further information about PSP can be found on PSP website: http://pspmodel.asu.edu

3. 3 PSP Family of Models  PSP: industry (CMC) standard for bulk MOSFETs  PSP-based varactor model: industry (CMC) standard  PSP-SOI-PD: submitted to CMC for evaluation (sponsored by IBM)  PSP-SOI-DD: submitted to CMC for evaluation (sponsored by Freescale)  PSP-MGFET  PSP-LT: PSP model for the extended temperature range for space applications (NASA/JPL)  PSP-R2H: PSP-based model for the physics-based real-time evaluation of radiation, EMP and reliability effects at the circuit level

4. 4 Outline  PSP project overview ► Introduction to bulk PSP  Recent developments in bulk PSP  PSP-SOI  PSP-MGFET  Conclusions

5. 5  s -Based vs. V th -Based Models V SB = 0 V; V DS = 1 V PSP V th -based

6. 6 Advanced Features of PSP  Non-iterative formulation  Completely surface-potential-based including the S/D overlap regions  Complete symmetry of device characteristics including all higher- order effects  Advanced mobility model including Coulomb scattering  Perfect reproduction of g m /I d ratio  Capability to model harmonic distortion including intermodulation effects  Physical gate current model including accurate bias-dependent partitioning scheme implemented via symmetric linearization method

7. 7 Advanced Features (cont’d)  The most complete ever noise model correctly including velocity saturation effects and all noise sources  Extensively verified unified large-signal/small signal NQS Model  Most complete and physical junction diode model (JUNCAP2)  Inclusion of non-uniform doping  Accurate CLM modeling in halo-doped devices  New mathematical structure of the model based on solution of several long-standing problems of compact modeling (e.g. symmetric linearization, spline-collocation NQS model, etc.)

8. 8 Non-Universality of the Effective Mobility Produced by the Coulomb Scattering Effective Field (MV/cm) Normalized Mobility Produced by Coulomb Scattering Term

9. 9 Drift Velocity  PSP uses drift velocity model that is conducive to the highly accurate description of saturation region including high order drain conductances  This form also assures compliance with Gummel symmetry test and non-singular model behavior at V ds = 0. Electrons: Holes:

10. 10 G m /I D Plots for Two Corners of the 90 nm Process I D (A) 10µm/0.04µm G m / I D (1/V) I D (A) 10µm/1µm V DS = 0.025V, V BS = 0 to -1.2V, and V GS = 0 to 1.2V

11. 11 Output Conductances V GS = 0V to 1V in steps of 0.2 V, V SB = 0V T = 25 0 C V DS (V) g DS (A/V) W/L=10/1µm V DS (V) g DS (A/V) W/L=10/0.04µm

12. 12 Higher Order Transconductances and Conductances V SB =0V, T=25 0 C, W/L=10/0.04µm (nmos), i=1(lower curve), 2(middle curve), 3(upper curve) V GS (V) g m i (A/V) V DS = 0.025V g DS i (A/V) V DS (V) V GS = 1V

13. 13  Theoretical foundation of PSP is symmetric linearization method: it is used to simplify surface-potential-based approach and to make it practical.  To simplify formulation compact MOSFET models almost always use bulk and inversion charge linearization. The traditional form is  In V th -based models:  Disadvantage: symmetry between source and drain is lost, accuracy is poor Traditional Asymmetric Linearization

14. 14 Symmetric Linearization  Define surface potential midpoint (subscript “m”)  For V DS > 0, this is not a geometric midpoint:  Set inversion charge (per unit channel area)

15. 15 Example of What Symmetric Linearization can Accomplish  Original CSM (C. McAndrew and J. Victory, 2003)  PSP

16. 16 Verification of Symmetric Linearization V ds = 2V, V bs = 0 V, V fb =-1V

17. 17 CV Characteristics W/L = 800µm/90nm, V ds =0, V sb =0 W/L=10/0.08µm, V bs =-0.1V, V gs =1.2V V ds (V)

18. 18 Gate Tunneling Current Components  The same form of model and identical parameters are used in I gc, I gsov and I gdov  No scaling parameters are required to fit the data V DS =0V to 1V in steps of 0.5 V V SB =0V, W/L=10µm/1µm (nmos) T=25 0 C

19. 19 PSP Noise Model  Includes thermal channel noise, 1/f noise, channel-induced gate noise and shot-noise in the gate-current  Thermal channel noise automatically becomes shot noise below threshold, so it is not necessary to model this phenomena separately  Rigorously includes fluctuations in the velocity saturation term.  Takes advantage of symmetric linearization to simplify expressions for the spectral densities  Experimentally verified  Example Drain (S id ) and gate (S ig ) current noise spectral densities

20. 20 NQS Model Verification: Re[Y 11 ] V DS =1.5 V, V GS = 0.5 to 1.5 in 0.5V steps PSP, SWNQS=9 MM11, 5 segments PSP, SWNQS=5

21. 21 Outline  PSP project overview  Introduction to bulk PSP ► Recent developments in bulk PSP  PSP-SOI  PSP-MGFET  Conclusions

22. 22 Recent Developments in PSP  Optional asymmetric junctions  Optional separate doping profiles for I(V) and C(V) characteristics  Optional suppression of back-bias effect for high back biases  GA-based automatic procedure for parameter extraction (local and global)  PSP-LT: PSP model for the extended temperature range

23. 23 Automatic GA  LM Parameter Extraction  GA - Genetic Algorithm, LM - Levenberg  Marquardt Algorithm  Objectives Unbiased evaluation of new parameters (are they really needed) Ease of parameter extraction  Example : Table I. Relative RMS error (%) on I d (V d ) with ALP2 on and off. Setting W=L=10  mW/L=10/0.24  mW/L=10/0.06  m Fit with ALP2=0 Fit with ALP2  0 1.6 0.63 2.9 1.7 2.5 1.8

24. 24 Automatic Parameter Extraction Results for PSP 102.1 W=L=10  m W/L=120/65nm

25. 25 measured PSP Non-uniform Doping L = 45 nm V DS = 50 mV V SB = 0 … 1.3 V 0.00.51.0 V GS (V) I ds (arb. units) PSP 102 0.00.51.0 I ds (arb. units) V GS (V) PSP 103 with NUD

26. 26 Non-uniform Doping Effective body factorThreshold voltage

27. 27 Decouple C-V and I-V Using a single effective N SUB for both I-V and C-V Shift of V th due to lateral halo doping Separate N SUB for I-V and C-V Achieve better fit using alternative N SUB for C-V only An IBM process using halo doping (from J. Watts) New C-V fit does not affect I-V

28. 28 Parameter Extraction Flowchart For PSP 103

29. 29 Outline  PSP project overview  Introduction to bulk PSP  Recent development in bulk PSP ► PSP-SOI  PSP-MGFET  Conclusions

30. 30  EVB affects I DS linearity at high V GS  Model can faithfully reproduce the “humps” in g m characteristics W/L = 3  m/0.13  m Impact of EVB on DC-IV

31. 31 Parasitic BJT  q B incorporates the Early effect and high level injection  Recombination current in neutral body region  Junction diffusion capacitance G BOX Substrate body SD W/L = 3  m/0.055  m V E =V S =0 V V G = -0.3 V V D =V B

32. 32   B : mobility of majority carriers in the body  Q nbr : total mobile majority charge in the neutral body region  Mobile charges in neutral body region  Total bulk charge D S L Substrate t ox t si t box Q js Q jd QBfQBf Q nbr G  Bias independent  Bias dependent Bias-Dependent Body Resistance Model Based on Freescale in-house R body model (G. Workman et al.)

33. 33 Example: 65nm PD/SOI H-gate W/L = 3  m / 65nm V GS = -0.3 V; V DS = 0 V ISIS BfBf GSD BsBs IfIf +-+- V BS Junction leakage

34. 34 V DS =0.6, 0.7, 0.8, 0.9V Excess Low Frequency Noise Modeled Automatically  Excess LF noise is caused by floating body effect PD/SOI floating body W/L = 3  m/0.055  m G E S D C SB C EB C DB C GB r eq Excess noise W. Jin et al T-ED 1999

35. 35 Body-Contacted PD/SOI L=150nm 75nm 65nm 55nm V GS = 0.2, 0.4, 0.6, 0.8, 1.0, 1.3 V V BS = 0.0 V W=3  m, L=55nm-150nm

36. 36 BC PD/SOI Cont’d L=150nm 75nm 65nm 55nm V BS = -0.2, 0, 0.2, 0.4, 0.6 V V DS = 0.05 V

37. 37 PSP-SOI-PD Harmonic Balance Simulation PD/SOI floating body; W/L = 3  m/0.055  m

38. 38 Outline  PSP project overview  Introduction to bulk PSP  Recent development in bulk PSP  PSP-SOI ► PSP-MGFET  Conclusions

39. 39 DGFET and SGFET Structures Double GateSurrounding Gate

40. 40 Symmetric Linearization for DGFET SL formulation:

41. 41 Symmetric Linearization for SGFET

42. 42 Conclusions  Surface-potential-based approach to MOSFETs of all kinds is an undisputed industry standard  PSP model includes all relevant device physics and its accuracy is verified down to 32 nm technology node  PSP model structure is flexible and is easily extendable to enable the model to serve as gateway for advanced CMOS design in the coming years  Work is in progress to add the latest developments and to maintain and upgrade the model code  PSP family includes bulk, varactor, SOI and FinFET models

43. 43 Acknowledgements  PSP developers are grateful to C. McAndrew, P. Bendix, J. Watson, and G. Workman for numerous stimulating discussion of the subject of compact modeling  The development of PSP is continuously funded in part by SRC since 1998  Testing and implementation of PSP is funded in part by CMC  Past funding from LSI Logic, Mentor Graphics, Freescale, IBM and TI is gratefully acknowledged