2. Ernest Cachia University of Malta “Real-Time System Development” Slide No. 1 of part 2 Schematic Task Execution Example time EABCDF (Deadline) Execution iExecution i+1 Key AD: Task execution time AF: Task period AE: Jitter BC: Transport lag

3. Ernest Cachia University of Malta “Real-Time System Development” Slide No. 2 of part 2 More About Deadlines Usually defined as: n Hard If missed, usually result in some sort of system catastrophic failure n Firm If missed, usually cause the system to produce useless (or senseless) results n Soft If missed, usually deter from the usefulness of the results in direct proportion to the extent by which the soft deadline is missed

4. Ernest Cachia University of Malta “Real-Time System Development” Slide No. 3 of part 2 Performance of R-T Systems Main players are: n Response time F Context switching F Interrupt latency F Computation speed F Data storage access speed n Data transfer rate F Loads of hardware stats (I/O throughput, bus inertia, disk performance, memory/buffer size, controller performance, etc.)

5. Ernest Cachia University of Malta “Real-Time System Development” Slide No. 4 of part 2 Interrupt Handling n In non-R-T systems interrupts may be handled whenever deemed appropriate by the system n In R-T systems it’s the external world which dictates when the system is to respond. n Interrupts need not be sequential - meaning the allocation of priorities to different interrupts

6. Ernest Cachia University of Malta “Real-Time System Development” Slide No. 5 of part 2 Multi-priority Interrupts time Interrupt priority level 3 2 1 0 Key Level 3 interrupt execution Level 2 “ “ Level 1 “ “ Normal computation priority

7. Ernest Cachia University of Malta “Real-Time System Development” Slide No. 6 of part 2 Important Interrupt Modelling Facts n More than one real-world interrupt can arrive at any time n Interrupts can be interrupted by others with a higher priority n Too many interrupts can hinder overall R-T system performance n Devise ways by which to minimise the impact of multiple interrupts on the system

8. Ernest Cachia University of Malta “Real-Time System Development” Slide No. 7 of part 2 Dynamic performance calculation Take into account: n Average interrupt frequency n Average time required to service a serviceable interrupt n Other parts of the software that can interrupt their servicing It is of system-vital importance that the system remains capable of meeting all its time constraints even in the face of “interrupt onslaught”. Failure to do so will result in system collapse.

9. Ernest Cachia University of Malta “Real-Time System Development” Slide No. 8 of part 2 Part 1 of your assignment PLEASE SEE SEPARATE DOCUMENT, THE NAME OF WHICH WILL BE ANNOUNCED IN DUE COURSE, FROM WEBSITE DOWNLOAD OR ANNOUNCMENTS AREAS

10. Ernest Cachia University of Malta “Real-Time System Development” Slide No. 9 of part 2 R-T Task Classification n Periodic Execution starts at pre-defined intervals n Aperiodic Random execution start times n Server Resource sharing and synchronisation

11. Ernest Cachia University of Malta “Real-Time System Development” Slide No. 10 of part 2 Task Class Properties Rate Jitter Deadline Execution time PERIODIC Exceptions Priority Execution time Deadline Activation & execution conditions Priority APERIODIC Timing constraints Activation & execution conditions Usage constraints SERVER

12. Ernest Cachia University of Malta “Real-Time System Development” Slide No. 11 of part 2 Example of R-T System Requirements (Based on example in “Software Engineering Fundamentals” by A. Behforooz et al.) Execution time= 20 ms Period = 100 ms Execution time= 40 ms Period = 150 ms Deadline= 130 ms Execution time= 100 ms Period = 350 ms Periodic Task 1 Periodic Task 2 Periodic Task 3 Usage: 1(2 ms), 2(20 ms) Usage: 1(10 ms), 3(10 ms) Server Task 1 Server Task 2 Mean arrival time= 50 ms Execution time= 3 ms Deadline= 5 ms Aperiodic Task 1 Mean arrival time= 40 ms Execution time= 2 ms Deadline= 4 ms Aperiodic Task 2

13. Ernest Cachia University of Malta “Real-Time System Development” Slide No. 12 of part 2 Execution Time Estimation Values required for calculation are: n Average instruction execution time n Interrupt latency n Very detailed description of task n I/O instruction execution time Interrupt latency is analysed in the following slide...

14. Ernest Cachia University of Malta “Real-Time System Development” Slide No. 13 of part 2 Interrupt Latency Composition Interrupt latency Interrupt occurs Save state of current task Decode interrupt Start and complete interrupt actions Save state of interrupt Restore state of interrupted task Continue execution of interrupted task 1 2 3 4 5 6 7

15. Ernest Cachia University of Malta “Real-Time System Development” Slide No. 14 of part 2 Execution Time Estimation Example (1) Known quantities are: n Task rate (30 s -1 )  period of 33.33 ms n Longest exec. path (2900 sloc) n HLL-to-assembly expansion (6:1) n Interrupt latency (0.1 ms) n Av. int. trans. delay (0.85 ms) n Av. instruction exec. time (300 ns) n Assume a “cushioning” of 20%

16. Ernest Cachia University of Malta “Real-Time System Development” Slide No. 15 of part 2 n Max task execution time: 2900 sloc x 6 = 17,400 tloc n 1 tloc execution time: 0.0003 ms n Total tloc execution time: 17,400 tloc x 0.0003 ms = 5.22 ms n Total execution time for 1 task: (total tloc exe. + int. trans. delay + int. latency) 5.22 ms + 0.85 ms + 0.1 ms = 6.17 ms n Total periodic execution time: 6.17 ms x 30 tasks/s = 185.1 ms n Include cushioning (20%): 185.1 ms + 10.8 ms = 196 ms Execution Time Estimation Example (2)