ICARUS General Trigger Design Contributions from: M.Della Pietra, A.Di Cicco, P.Di Meo, G.Fiorillo, P.Parascandolo, R.Santorelli, P.Trattino B.Baboussinov, S.Centro, F.Pietropaolo, S.Ventura Work jointly conducted by Napoli and Padova groups
Supernova burst Specific time structure –Ex.: ~ 100 SN triggers in T300 in 1 sec Global trigger: bandwidth + storage problem –1 event = 27648 ch 2500 samples 2 bytes –~ 130 MB 13 GB total Local trigger: SN events are localized and limited to 1 crate per view –5 events per crate in COLL + IND2 views ~ 40 MB/crate –13 events per crate in IND1 view ~ 60 MB/crate Each crate can be read-out as a separate event (See A.Rubbia presentation Sept. 02)
Segmentation and Selectivity Cosmic-ray shower Muon Low energy electrons
T600 pixel definition Rack 1 Rack 20 Rack 11Rack 13 T600 Half Module – 1 chamber viewed from cathode 1 pixel area: ~ 0.6 m 2 Total Number of Pixels ~ 80 32 x 9 Induction II wires 32 x 9 Collection wires 864 mm
MC simulation: low energy events ICAFLUKA, special thanks to G. Battistoni)
MC simulation: high energy events ICAFLUKA, special thanks to G. Battistoni)
Preliminary considerations Trigger rate is dominated by physics background –Neutron capture rates expected in T600 (ICARUS/TM- 2002/13) : 2 10 -4 s -1 from natural radioactivity of the rock 0.03 0.1 s -1 from Al container Segmented trigger potentially solves bandwidth and storage problems Event pre-classification data streams –extraction of solar neutrino data from low energy stream Test bench for T1200 low energy trigger
Basic design requirements Redundancy important to measure efficiency Global trigger: –Generated by PMTs or external –drift deadtime GLOBAL_DRIFT (1ms) –Read-out deadtime GLOBAL_BUSY (1s) vetoes new global triggers –Local triggers vetoed during GLOBAL_DRIFT Local trigger: –Generated by AWS + PMT –LOCAL_DRIFT (1ms) vetoes new local triggers
Trigger system architecture 1.LTCU: discriminates the 18 inputs, has one independent threshold for each input, gives two trigger proposal as output; 2.TCU: performs coincidences between LTCUs proposals, processes the fired pixels to study and label the event topology, requests global or local trigger; 3.Trigger Supervisor: monitoring of the trigger and the DAQ system, statistical functions.
Trigger System Architecture LTCUTCU TRIGGER SUPERVISOR DAQ CERN or any other external request 20 boards per chamber (80 boards for T600) from v791 n-bit request v816 96 9 4 boards per T600 9 Trigger Distribution T 1 20 T 2 20 T11T11 T21T21 LTCU PMT
LTCU v1.0 test on Geneva prototype and LTCU v2.0
discriminate the inputs, coming from the v791 boards; give as output two separate trigger proposals to the next level, one for Induction II and one for Collection; remote control of all the board’s functionalities; discriminators check-control; trigger rate measurements for each input. The Local Trigger Control Unit prototype targets
FPGA Input stage RS232 interface 10 MHz oscillator Power supply 18 inputs Trigger outputs DAC The LTCU prototype v1.0 IN V DAC Discriminator Voltage follower RC filter OUT IN
The LTCU functionalities v1.8i Mask the input channels; Read the mask status; Set the thresholds; Monitor the trigger rate for each input; Discriminator test mode; Select one discriminator output put on front panel. All the board functionalities are remotely controlled via RS232 interface.
Trigger rate test chain LTCU inputs = 4 signals from collection plane; Trigger generated from only one input (no FastOR); LTCU trigger output distributed to V816 module. LTCU Trigger OUT V789 LTCU V791 IndColl IN OUT IN OUT IN Analog OUT V816 trigger PC (RS232)
Trigger efficiency test chain LTCU inputs = 4 signals from collection plane; One LTCU IN and Trigger OUT digitalized by a modified V791; PMT trigger distributed to V816 module. PMT V789 LTCU V791 IndColl IN OUT IN OUT IN Analog OUT V816 trigger PC (RS232) OUT IN Modified V791
Test Results (II) ProblemsSolutions High frequency noise on input signal Band-pass filter ( f -3dB H = 2 MHz, f -3dB L = 1 kHz ); Offset for negative input isn’t a stable solution Inverter amplifier (G=1) in the input stage; More than 20mV white noise New pcb (with 8 layers) and EM/RF screening Not stable DAC threshold Stable V REF circuit
LTCU prototype v2.0 Power supply an filter Input stage (for one channel) or IN Band-pass filterSelectable inverter (G=1) V Test V TH OUT IN V TH DAC (for one channel) V REF V REF for DAC Filter for low noise performance Stable 259mV tension circuit V REF EM/RF Screening for input stage
PWR and GND distribution for LTCU v2.0 ±5A, AGND (V791 preamp. stage) +5A1, AGND1 (V791 mux stage) VCC, DGND (V791 digital stage) Four GND and two PWR planes
Conclusions LTCU v2.0 is being produced (5 boards); Ready to be tested on detector prototypes; Analysis of test data in progress; Article in preparation.