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1 DASC & JEITA/EDA-TC on 27 January 2005 in Yokohama, Japan EDA-TC/STD-TSC in JEITA Renesas Yoshio Okamura.

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Presentation on theme: "1 DASC & JEITA/EDA-TC on 27 January 2005 in Yokohama, Japan EDA-TC/STD-TSC in JEITA Renesas Yoshio Okamura."— Presentation transcript:

1 1 DASC & JEITA/EDA-TC on 27 January 2005 in Yokohama, Japan EDA-TC/STD-TSC in JEITA Renesas Yoshio Okamura

2 JEITA Structure and Management EDA-TC Current major activities STD-TSC and TC93/WG2 activities SystemC-TG, SytemVerilog-TG Activities DASC- ” EDA-TC ” Collaboration Structure - Outline - JEITA : Japan Electronics and Information Technology Industries Association ( URL http://www.jeita.or.jp)

3 JEITA Structure and Management Japan Electronics and Information Technology Industries Association JEITA Information Systems Board Personal Informatization Board Digital Home Appliances Board Industrial Equipment and Social Systems Board Display Devices Board Electronic Components Board Semiconductor Board(JEITA-JSIA) Semiconductor Industrial Affairs Committee Semiconductor International Affairs Committee Semiconductor Technology Committee Marketing Committee Road Map Committee EDA Technical Committee(EDA-TC) Chair: T.Hiwatashi(Toshiba) uEDA Technical Committee was formed to handle EDIF 2.0 standard as one of technical committees in JEITA (former EIAJ) in April 1990.

4 EDA-TC Current major activities 2. Study Groups ■PDM (Physical Design Method) Study Group Chair: K.Hachiya(NECEL) - To investigate and propose solutions for technical issues raised by very deep sub-micron ( 0.10um and below) SOC design 1. Standardization Technical Subcommittee(STD-TSC) - To contribute EDA related standardization efforts by supporting EDA standards related groups and organizations such as Accellera, IEEE/IEEE-SA, IEEE/DASC, IEC/TC93, OSCI... 3. EDSFair Executive Committee Chair : Y.Fujinami(NECEL) - To organize and support events to promote and encourage EDA technology and standards. To sponsor the EDS Fair exhibition show ■SystemC Task Group Chair: T.Hasegawa(Fujitsu) ■SystemVerilog Task Group Chair: K.Hamaguchi(Matsushita) Chair : Y.Okamura(Renesas)

5 Members: Experts from Academia, Semiconductor industries and EDA industries Topics Assignment Dr.Karatsu to TC93 Chairman Assignment Dr.Kambe to TC93 JPN NC secretary Activities : To contribute EDA standardization in cooperation with standard organizations Accellera, OSCI IEEE/DASC, IEEE-SA Joined IEEE-SA in December,2004 STD-TSC and TC93/WG2 Activities

6 SystemC-TG, SytemVerilog-TG Activities SystemC-TG - Participating IEEE P1666-WG as a voting member - Started review work of the latest version of the SystemC 2.0.1 LRM, and planned to review the SystemC 2.1 LRM, when it available - Creating the “World Wide SystemC Industrial/Academic Trend Report" - Hosting IEEE P1666-WG to share information on 27 Jan.,2005 SystemVerilog-TG - Submitted 32 errata to Accellera and IEEE P1800-WG. these errata has been registered into the database ( http;//www.eda.org/svdb ) and assigned ID numbers 126-157 - Creating the "Technical term dictionary" for Japanese industry standard - Hosting IEEE P1800-WG to share information on 26 Jan.,2005 Collaboration of two task groups - Co-hosting the SystemC/SystemVerilog User's Forum in EDS & Fair on 27 Jan., 2005 at Yokohama

7 IEICE TC93 JNC JEITA STD-TSC WG2 JNC IEEE IEEE-SA IEC (Int’l) TC93 (Int’l) WG2 Accellera, OSCI WG2 JNC EDA-TC SC WGs(P1666,P1800,,,) DASC CAG NesCom,RevCom, SCTG SVTG Member (’04/12~) Standars Collaboration DASC-”EDA-TC” Collaboration Structure (Dual Logo) Representative


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