1. Energy-Effective Issue Logic Hasan Hüseyin Yılmaz

2. Outline Introduction Introduction Why is Energy Consumption a big issue ? Why is Energy Consumption a big issue ? What can be done ? What can be done ? Objectives ? Objectives ? Related works Related works Definitions Definitions What is issue logic What is issue logic Register Rename Logic Register Rename Logic Wake-up logic Wake-up logic Selection logic Selection logic Solution Solution Architectural Design Architectural Design Changes made to wake-up logic Changes made to wake-up logic Changes made to selection logic Changes made to selection logic Results Results Experiments Experiments Conclusions Conclusions

3. Why is power consumption is a big issue More than %95 of the current microprocessor are used in embedded systems More than %95 of the current microprocessor are used in embedded systems Battery life is bottleneck of mobile systems Battery life is bottleneck of mobile systems Begining to reach the limits of conventional cooling technique Begining to reach the limits of conventional cooling technique Power saving vs performance Power saving vs performance

4. Objectives To show the potential in power saving through dynamically reconfiguring the issue logic To show the potential in power saving through dynamically reconfiguring the issue logic To maximize the flexibility for a system to carry out reconfigurations in an effective and efficient manner To maximize the flexibility for a system to carry out reconfigurations in an effective and efficient manner Minimize the impact on performance Minimize the impact on performance

5. Related Works Scaling voltage and frequency dynamically Scaling voltage and frequency dynamically Programmable thermal threshold Programmable thermal threshold Disable unused part of the processor Disable unused part of the processor Reducing cache power Reducing cache power Smart branch predictions mechanisms Smart branch predictions mechanisms

6. Pipeline Organization More flexibility in reconfiguring the pipeline due to different types of instructions More flexibility in reconfiguring the pipeline due to different types of instructions Associated signals are disabled when a cluster is disabled  power saving !! Associated signals are disabled when a cluster is disabled  power saving !! All instructions within an enabled cluster are “visible” to the selection logic  power inefficient !! Shrinking in issue queue size  limit exposure to ILP

7. Pipeline organization 2 pipeline stages pipeline stages

8. Experimental system

9. Energy consumption of units in microprocessor for fp programs

10. Energy consumption of units in microprocessor for integer programs

11. Concerns Concantrate on Issue Logic Concantrate on Issue Logic Issue Logic consist of 2 sub parts Issue Logic consist of 2 sub parts Wake-up Logic Wake-up Logic Selection Logic Selection Logic

12. Wake-up Logic Updates source dependences for instructions in the issue window waiting for their source operands to become available Updates source dependences for instructions in the issue window waiting for their source operands to become available

13. Selection Logic Chooses instructions for execution from the pool of ready instructions Chooses instructions for execution from the pool of ready instructions

14. Power consumptions Instruction queue and its associated issue logic are responsible for %25 of the total power consumption of microprocessor Instruction queue and its associated issue logic are responsible for %25 of the total power consumption of microprocessor Empty entries and ready entries wastes power on wake-up logic Empty entries and ready entries wastes power on wake-up logic Dynamically resize instruction queue to utilize energy usage Dynamically resize instruction queue to utilize energy usage

15. Solution Wake-up logic is disabled for Empty and ready entries in issue queue Wake-up logic is disabled for Empty and ready entries in issue queue An Algorithm developed to dynamically resize the instruction queue An Algorithm developed to dynamically resize the instruction queue

16. Energy analysis for wake-up logic Energy consumption of empty entries is on average %74.9 of issue logic Energy consumption of empty entries is on average %74.9 of issue logic Energy consumption of ready entries is on average %14 of issue logic Energy consumption of ready entries is on average %14 of issue logic Wake-up logic wastes %89 of total issue logic Wake-up logic wastes %89 of total issue logic

17. Issue Queue Structure Non-ready instructions are hidden from the selection logic  power efficient Non-ready instructions are hidden from the selection logic  power efficient Exposure to potential ILP is maximized by maintaining the size of issue queue at all times Exposure to potential ILP is maximized by maintaining the size of issue queue at all times Broadcasting of computed results are restricted to non-ready instructions only  power efficient Broadcasting of computed results are restricted to non-ready instructions only  power efficient

18. Dynamically resized issue queue

19. Algorithm Add a bit to reorder buffer Add a bit to reorder buffer Divide instruction queue to smaller portions Divide instruction queue to smaller portions Set bit zero when instruction dispatched Set bit zero when instruction dispatched When an instruction is issued this bit is set if it is from the youngest portion of instruction queue When an instruction is issued this bit is set if it is from the youngest portion of instruction queue İncrease a counter İncrease a counter Check counter in certain number of cycles which is referred as “ quantum” Check counter in certain number of cycles which is referred as “ quantum” İf it is smaller than a determined number reduce instruction queue size by 1 portion İf it is smaller than a determined number reduce instruction queue size by 1 portion Every 5 quantum we increase queue size 1 portion if it is not at maximum size Every 5 quantum we increase queue size 1 portion if it is not at maximum size

20. Dynamic issue queue Analysis Performance hardly effected Performance hardly effected On average %1.7 IPC lost On average %1.7 IPC lost

21. Conclusion Energy Consumption reduced %15 on average by whole processor Energy Consumption reduced %15 on average by whole processor Lost %1.7 IPC on average Lost %1.7 IPC on average

22. Conclusion 2 “ A good design strategy should be flexible enough to dynamically reconfigure available resources according to the program’s needs” [2]. “ A good design strategy should be flexible enough to dynamically reconfigure available resources according to the program’s needs” [2]. Most energy cosuming part of the processor is out of order intruction issuing mechanism. Most energy cosuming part of the processor is out of order intruction issuing mechanism. Much unneeded activity and checks are done in issue logic Much unneeded activity and checks are done in issue logic

23. References Folegnani, D. and González, A. 2001. Energy-effective issue logic. In Proceedings of the 28th Annual international Symposium on Computer Architecture (Göteborg, Sweden, June 30 - July 04, 2001). ISCA '01. Bai, Y. and Bahar, R. I. 2004. A low-power in-order/out-of- order issue queue. ACM Trans. Archit. Code Optim. 1, 2 (Jun. 2004), 152-179 Canal, R. and González, A. 2000. A low-complexity issue logic. In Proceedings of the 14th international Conference on Supercomputing (Santa Fe, New Mexico, United States, May 08 - 11, 2000). Palacharla, S., Jouppi, N. P., and Smith, J. E. 1997. Complexity-effective superscalar processors. In Proceedings of the 24th Annual international Symposium on Computer Architecture (Denver, Colorado, United States, June 01 - 04, 1997).

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