1. A Detailed Discussion of SRAM Niels Asmussen Maggie Hamill William Hunt

2. RAM vs. SAM Random Access Memory –direct access to data - DRAM- SRAM Sequential Access Memory –start at the beginning go through all data until location is found -Magnetic Tape -Paper Tape Hybrid (often referred to as Direct access) –go directly to track, then get to data sequentially depending on where the head is -Floppy -Hard disk

3. Random Access Memory Volatile –Except CMOS setup chip Storage of RAM –SIMMs –DIMMs

4. Dynamic RAM (DRAM) –More common –Slower access –Must be refreshed Static RAM (SRAM) –More expensive –Much faster access –Don’t need to be refreshed Types of RAM

5. SRAM Synchronous –Control signal synchronized with clock signal Burst Pipeline Burst Asynchronous –Not in synch with CPU

6. SRAM and Cache SRAM used for cache because of speed Memory hierarchy –Hard drive –Main memory –Level 2 Cache –Level 1 Cache Concept –Code that is used repeatedly

7. Cache Basics Data stored in cache-line –Identified by tag –Locality Searches are hit-or-miss Four different types of cache mapping

8. Fully Associative Data placed anywhere in cache Searching algorithm complicated –Every address tag must be compared Expensive –Hit rate best, but not necessarily quickest

9. Directly-Mapped Cache Each memory address linked to location in cache Searching is simple Cache conflicts frequent –Multiprocessors and small loops Often use on motherboards

10. Set-Associative Cache Compromise between fully associative and directly-mapped cache –Cache lines added to directly mapped Searching simpler Good use of locations Often used in Level 1 Processor cache

11. Sector Mapping Memory and cache divided into X sectors and N lines Tag of sector checked first –Tag of line checked, hit or miss reported

12. The Future of SRAM Consortium of companies joined together to work on SRAM specifications –Six companies controlling 70% of the worldwide synchronous SRAM Started development of QDR SRAM in 1999

13. QDR SRAM Quad Data Rate SRAM –2 reads and 2 writes per clock Designed for high performance applications –48 Gb/s –Communications equipment Routers, network switches

14. Uses High end machines High speed solid state memory devices –Battery backup –256KB to 8MB Cache on DRAM chips –Increase speed CPU Cache Interface cards –Networking cards –Graphics cards

15. Quiet Companies are trying to keep their next generation products secret Higher Bandwidth More Storage Capacity Reduce physical size New 52MB SRAM Chip