1. National Taiwan University Department of Computer Science and Information Engineering 1 Optimal Real-Time Scheduling for Uniform Multiprocessors 薛智文 助理教授 台灣大學資訊工程學系 資訊網路暨多媒體研究所 cwhsueh@csie.ntu.edu.tw Shih-Ying Chen and Chih-Wen Hsueh, "Optimal Dynamic-priority Real-Time Scheduling Algorithms for Uniform Multiprocessors," Proc. 29th IEEE Real-Time Systems Symposium, 147-156, Barcelona, Spain, Dec. 2008. 2011/3/2

2. National Taiwan University Department of Computer Science and Information Engineering Task 1 Task 2 Task n … (periodically) Looking for simple condition to be feasible or schedulable. Scheduling /46 2 Processor 2 … Processor m Processor 1

3. National Taiwan University Department of Computer Science and Information Engineering /46 3 Kwang S. Hong and Joseph Y-T. Leung, ON-LINE SCHEDULING OF REAL-TIME TASKS, Real-Time Systems Symposium, 1988

4. National Taiwan University Department of Computer Science and Information Engineering Outline Introduction Multiprocessor Environments Motivation Contribution Definitions and Assumptions Model and T-L er Planes Scheduling Algorithms Conclusion and Future Work Q&A /46 4

5. National Taiwan University Department of Computer Science and Information Engineering Multiprocessor Environments Identical All the processors are identical. Uniform Execution time is dependent on the running processor. Scheduling algorithms for it might be adapted on asymmetric multi-core platform (AMP). Unrelated Execution time is independent on the running processor. /46 5

6. National Taiwan University Department of Computer Science and Information Engineering P1P1 T1T1 T2T2 TnTn … (periodically) RM and EDF are optimal. Uniprocessor Scheduling /46 6 C. L. Liu and J. Layland. Scheduling algorithms for multiprogramming in a hard real-time environment. Journal of the ACM, 10(1):46–61, 1973.

7. National Taiwan University Department of Computer Science and Information Engineering P1P1 T1T1 P2P2 T2T2 TnTn … … (periodically) LLREF is optimal, with preemption and migration. Identical Multiprocessor Scheduling PmPm /46 7 Hyeonjoong Cho, Binoy Ravindran, and E. Douglas Jensen. An optimal real-time scheduling algorithm for multiprocessors. RTSS, pages 101–110, Oct. 2006. (LLREF) R.R. Muntz and E.G. Coffman. Optimal preemptive scheduling on two-processor systems. IEEE Transactions on Computers, (11):1014–1020, Nov. 1969. (level algorithm)

8. National Taiwan University Department of Computer Science and Information Engineering P1P1 T1T1 T2T2 TnTn … … (periodically) Uniform Multiprocessor Scheduling PmPm /46 8 P2P2 Jane W.S. Liu and Ai-Tsung Yang, Optimal scheduling of independent tasks on heterogeneous computing systems, ACM '74 Proceedings of the 1974 annual conference, 1974 Well…

9. National Taiwan University Department of Computer Science and Information Engineering P1P1 T1T1 P2P2 T2T2 TnTn … … (periodically) PG or PCG is optimal, with preemption and migration. Uniform Multiprocessor Scheduling (cont.) PmPm /46 9 Edward C. Horvath, Shui Lam, and Ravi Sethi. A level algorithm for preemptive scheduling. Journal of the ACM, 24(1):32–43, January 1977. Shih-Ying Chen and Chih-Wen Hsueh, "Optimal Dynamic-priority Real-Time Scheduling Algorithms for Uniform Multiprocessors," Proc. 29th IEEE Real-Time Systems Symposium, 147-156, Barcelona, Spain, Dec. 2008. (PC, PCG)

10. National Taiwan University Department of Computer Science and Information Engineering Why “Uniform”? processor 1 with computing capacity = 2 processor 2 with computing capacity = 1 time task with execution requirement = 4 /46 10

11. National Taiwan University Department of Computer Science and Information Engineering T 1 (8, 10) T 2 (7, 10) One task can only run on one processor at a time. /46 11

12. National Taiwan University Department of Computer Science and Information Engineering Task migration might be easier on multicore platform P1P1 P2P2 … PmPm Shared memory /46 12

13. National Taiwan University Department of Computer Science and Information Engineering Motivation A simpler way to describe the execution behavior of tasks and processors. No existing optimal scheduling algorithm in terms of feasibility condition. /46 13

14. National Taiwan University Department of Computer Science and Information Engineering Guest OS VCPU Guest OS VCPU … … PCPU … App Hypervisor Scheduling OS Scheduling on Hypervisor /46 14

15. National Taiwan University Department of Computer Science and Information Engineering Contribution A novel description plane: T-L er plane Two optimal dynamic-priority on-line scheduling algorithms. /46 15

16. National Taiwan University Department of Computer Science and Information Engineering Definitions and Assumptions Assumptions : Uniform multiprocessors Task is periodic Deadline is equal to the end of period. Full migration Basic definitions On-line scheduling Dynamic-priority scheduling Preemptive scheduling /46 16

17. National Taiwan University Department of Computer Science and Information Engineering Definitions and Assumptions (cont.) Processors : Processor P i with computing capacity s i Assume s i in decreasing order : Tasks : Task T i with utilization u i where Assume u i in decreasing order : /46 17

18. National Taiwan University Department of Computer Science and Information Engineering Feasibility Conditions (Funk) S. Funk, J. Goossens, and S. Baruah. “On-line scheduling on uniform multiprocessors,” RTSS, Dec. 2001. SetProcessorsTasks 1 2 n /46 18

19. National Taiwan University Department of Computer Science and Information Engineering Outline Introduction Model and T-L er Plane P-fair and T-L Plane T-L Planes T-L er Planes Scheduling Algorithms Conclusion and Future Work Q&A /46 19

20. National Taiwan University Department of Computer Science and Information Engineering P-fair and T-L Plane Proportionate Fairness ( P - fair 1 ) Each task is scheduled resources in proportion to its utilization. Time and Local Remaining Execution Time Plane ( T-L plane 2 ) Show that scheduling for multiprocessors can be viewed as repeatedly occurring T-L planes. 1 S. Baruah, N. Cohen, C. Plaxton, and D. Varvel, “Proportionate progress: A notion of fairness in resource allocation,” Algorithmica, June 1996. 2 H. Cho, B. Ravindran, and E. D. Jensen. “An optimal real-time scheduling algorithm for multiprocessors,” RTSS, Oct. 2006. /46 20

21. National Taiwan University Department of Computer Science and Information Engineering P-fair: Each task is scheduled resources in proportion to its utilization. time remaining execution time 0 Task= (4, 8), (execution_time, period) 84 4 fluid schedule /46 21

22. National Taiwan University Department of Computer Science and Information Engineering local remaining execution time: utilization * ( t 2 – t 1 ) period time period t1t1 t2t2 T1T1 T2T2 remaining execution time P-fair and T-L Plane (cont.) /46 22

23. National Taiwan University Department of Computer Science and Information Engineering T-L Plane: Time and Local Remaining Execution Time Plane local remaining execution time time t2t2 t1t1 T1T1 T2T2 /46 23

24. National Taiwan University Department of Computer Science and Information Engineering local remaining execution time: utilization * ( t 2 – t 1 ) period time period t1t1 t2t2 T1T1 T2T2 remaining execution time T-L Planes … /46 24

25. National Taiwan University Department of Computer Science and Information Engineering T-L er Planes time remaining execution requirement 0 Task= (4, 8), (execution_requirement, period) 84 4 fluid schedule Time and Local Remaining Execution Requirement Plane ( T-L er Plane) /46 25

26. National Taiwan University Department of Computer Science and Information Engineering local remaining execution requirement: utilization * ( t 2 – t 1 ) period time period t1t1 t2t2 T1T1 T2T2 remaining execution requirement T-L er Planes (cont.) /46 26

27. National Taiwan University Department of Computer Science and Information Engineering Processor Boundary local remaining execution requirement time 0 Processor 1 Processor 2 Processor 3 … Processor n Speed10.60.4 … 0.1 /46 27

28. National Taiwan University Department of Computer Science and Information Engineering Rescheduling Events local remaining execution requirement time 0 Event B (Bottom hitting event) Event C (Ceiling hitting event) Event F (Floor hitting event) /46 28

29. National Taiwan University Department of Computer Science and Information Engineering Outline Introduction Model and T-L er Planes Scheduling Algorithms Precaution Greedy Scheduling Algorithm Precaution Cut Greedy Scheduling Algorithm Proof of Optimality Conclusion and Future Work Q&A /46 29

30. National Taiwan University Department of Computer Science and Information Engineering Framework time 0 84 remaining execution requirement 0 84 4 local time T1T1 T2T2 remaining execution requirement local remaining execution requirement time T-L er plane local /46 30

31. National Taiwan University Department of Computer Science and Information Engineering Why P and G? Greedy Precaution /46 31 local remaining execution requirement time 0

32. National Taiwan University Department of Computer Science and Information Engineering local remaining execution requirement time Precaution Greedy Scheduling Algorithm The times of rescheduling is unpredictable. 0 /46 32

33. National Taiwan University Department of Computer Science and Information Engineering time local remaining execution requirement Precaution Cut Greedy Scheduling Algorithm Give an upper bound of “ n ” rescheduling in a T-L er plane. 0 /46 33

34. National Taiwan University Department of Computer Science and Information Engineering PG vs. PCG When any event occurs, PG and PCG will reschedule. PCG reduce the times of rescheduling dramatically. /46 34

35. National Taiwan University Department of Computer Science and Information Engineering local remaining execution requirement time 0 Task Order ? /46 35

36. National Taiwan University Department of Computer Science and Information Engineering Task Order (cont.) local remaining execution requirement time event occurs /46 36

37. National Taiwan University Department of Computer Science and Information Engineering Outline Introduction Model and T-L er Planes Scheduling Algorithms Precaution Greedy Scheduling Algorithm Precaution Cut Greedy Scheduling Algorithm Proof of Optimality Conclusion and Future Work Q&A /46 37

38. National Taiwan University Department of Computer Science and Information Engineering IFF Feasibility Conditions (Funk) S. Funk, J. Goossens, and S. Baruah. “On-line scheduling on uniform multiprocessors,” RTSS, Dec. 2001. SetProcessorsTasks 1 2 n Feasibility Condition violated /46 38

39. National Taiwan University Department of Computer Science and Information Engineering 0 local remaining execution requirement time Proving PG is Feasible feasibility condition is violated s 1 ≥ u’ 1 s 1 + s 2 = u’ 1 + u’ 2 s 1 + s 2 + s 3 ≥ u’ 1 + u’ 2 + u’ 3 feasibility condition is violated s 1 ≥ u 1 s 1 + s 2 ≥ u 1 + u 2 s 1 + s 2 + s 3 ≥ u 1 + u 2 + u 3 initial condition ( T’ 1, T’ 2 ) could be ( T 1,T 3 ) or ( T 2,T 3 ) When any event occurs, PG will reschedule. Here we want to show any event occurs earlier than feasibility condition is violated. If u 2 > s 2 T 1 or T 2 will invoke event before feasibility condition is violated /46 39

40. National Taiwan University Department of Computer Science and Information Engineering 0 local remaining execution requirement time Proving PG is Feasible (cont.) feasibility condition violate s 1 ≥ u’ 1 s 1 + s 2 = u’ 1 + u’ 2 s 1 + s 2 + s 3 ≥ u’ 1 + u’ 2 + u’ 3 feasibility condition violate s 1 ≥ u 1 s 1 + s 2 ≥ u 1 + u 2 s 1 + s 2 + s 3 ≥ u 1 + u 2 + u 3 initial condition ( T’ 1, T’ 2 ) could be ( T 1,T 3 ) or ( T 2,T 3 ) If u 2 < s 2 T 3 will invoke event before feasibility condition is violated /46 40

41. National Taiwan University Department of Computer Science and Information Engineering Proving PG is Optimal In the beginning, set of tasks and processors is feasible. PG reschedules at any evens and is still feasible. /46 41

42. National Taiwan University Department of Computer Science and Information Engineering Proving PCG is Feasible When any event occurs, set of tasks and processors is feasible by PCG. Remove the task and the processor that invoke event. When event B occurs : u’ n = 0 When event C occurs : s 1 = u’ 1 When event F occurs : s i = u’ j i = j s i = u’ j i > j s i = u’ j i < j /46 42

43. National Taiwan University Department of Computer Science and Information Engineering Proving PCG is Feasible (cont.) We want to derive : ProcessorsTasks s1s1 ≥ u’ 1 s 1 + s 2 ≥ u’ 1 + u’ 3 (s 2 ≥ s 4 = u’ 2 ≥ u’ 3 ) s 1 + s 2 + s 3 ≥ u’ 1 + u’ 3 + u’ 4 (s 3 ≥ s 4 = u’ 2 ≥ u’ 4 ) s 1 + s 2 + s 3 + s 5 ≥ u’ 1 + u’ 3 + u’ 4 + u’ 5 When event F occurs, s 4 = u’ 2 ProcessorsTasks s1s1 ≥ u’ 1 s 1 + s 2 ≥ u’ 1 + u’ 2 s 1 + s 2 + s 3 ≥ u’ 1 + u’ 2 + u’ 3 s 1 + s 2 + s 3 + s 4 ≥ u’ 1 + u’ 2 + u’ 3 + u’ 4 s 1 + s 2 + s 3 + s 4 + s 5 ≥ u’ 1 + u’ 2 + u’ 3 + u’ 4 + u’ 5 /46 43

44. National Taiwan University Department of Computer Science and Information Engineering Proving PCG is Optimal In the beginning, the set of tasks and processors is feasible. PCG reschedules at any event and is still feasible. /46 44

45. National Taiwan University Department of Computer Science and Information Engineering Conclusion We presented T-L er plane which is easier for reasoning about the execution behavior of tasks and processors. Two optimal on-line scheduling algorithms Precaution Greedy scheduling algorithm Precaution Cut Greedy scheduling algorithm PCG reduces the times of rescheduling dramatically. Our result might be applicable to current asymmetric multicore platform. /46 45

46. National Taiwan University Department of Computer Science and Information Engineering Future Work Verifying the performance of PG and PCG. Implementing PG and PCG scheduling algorithms on asymmetric multicore platform. Reduce the migration times of PCG. Extend PCG to globally periodical. /46 46

47. National Taiwan University Department of Computer Science and Information Engineering Q&A Thanks for your attention!! /46 47