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ECE 265 – LECTURE 8 The M68HC11 Basic Instruction Set The remaining instructions 10/20/2015 1 ECE265.

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Presentation on theme: "ECE 265 – LECTURE 8 The M68HC11 Basic Instruction Set The remaining instructions 10/20/2015 1 ECE265."— Presentation transcript:

1 ECE 265 – LECTURE 8 The M68HC11 Basic Instruction Set The remaining instructions 10/20/2015 1 ECE265

2 Lecture Overview  The M68HC11 Basic Instruction Set  Stack and index register instructions  The remaining instructions classes are for program flow control Branch Instructions Jump Instructions Subroutine Calls No Operation Stop  REF: Chapter 3 and the appendix that details the instructions. 10/20/2015 2 ECE265

3 Stack &Index register instructions  These instructions allow manipulation of the index registers, X and Y, and exchange with the D accumulator. Additionally, they provide the ability to push and pop X and Y to/from the stack.  This class of instructions can be further subdivided into sub-classes of the type of operation. 10/20/2015ECE265 3

4 Modify value index reg or SP  To modify the value of the index register  Add B accumulator to X or Y: ABX ABY  Decrement the register: DES (stack pointer)  DEX DEY  Increment the register: INS (stack pointer)  INX INY  INX and INY (DEX,DEY) are only ones that affect CC register and then only the Z bit. 10/20/2015ECE265 4

5 Data manipulation of contents  Add the B accumulator to and index register  ABX ABY  Does not affect the CC register  Data testing of contents of index register  CPX CPY  There are compares to a 16-bit value in memory 10/20/2015ECE265 5

6 Move the X and Y index registers  Push them on the stack – copy the value in the register to the top of the stack. The register stays the same value. These are 2 byte push and pop operations.  PSHX PSHY  Pull the top 2 bytes from the stack into X or Y  PULX PULY  Store the X or Y index register or the SP  STX STY STS  Load the X or Y index register or the SP  LDX LDY LDS 10/20/2015ECE265 6

7 Register interchange instructions  Exchanges  D with X: XGDX  D with Y: XGDY  Transfers  Stack pointer to X or Y: TSX TSY  X or Y to the Stack Pointer: TXS TYS  On a transfer what is the value of the register transferred from after the operation?  What values is transfrred? 10/20/2015ECE265 7

8 Register interchange instructions  Values before execution  SP -- $C100  X -- $000C  Execute a TSX instruction  Values now  SP -- $C100  X -- $C101  X is loaded with 1 plus the contents of the stack pointer so that it points to the last value that was stored on the stack. 10/20/2015ECE265 8

9  Ended here on Fri Jan 27, 12 10/20/2015ECE265 9

10 Program flow control instructions  When a task is sequential simply increment through the steps of tasks will accomplish it.  However, in computer programming for most applications, and especially embedded control applications, the programs typically have actions based on the status of the various inputs or internal counters and timers.  These instructions control what part of the program will execute next. They control the flow of execution and are often referred to as program flow control instructions. 10/20/2015ECE265 10

11 Conditional Branches  These are instructions to the control the flow of execution based on a value in the condition code register.  Their general execution is:  If the condition tested is false execution continues with the next instruction.  If the condition tested is true then execution continues at the relative location indicated in the argument of the instruction. 10/20/2015ECE265 11

12 The effect of a branch  A branch controls the flow of execution 10/20/2015ECE265 12

13 A table of the HC11 branches  The  Instructions  Note the  mode is  relative 10/20/2015ECE265 13

14 Relative addressing mode  Relative means the address is related to something.  It is related to the current instruction address which is in the program counter (PC). The instruction argument is the offset to be taken if the condition is TRUE.  The offset can be positive of negative. It is an 8 bit quantity that is treated as a 2’s complement value and allows offsets of -128 to +127. 10/20/2015ECE265 14

15 An example  This is a timing delay loop  DECB takes 1usec  BNE takes 1.5 usec  LDAB immediate mode takes 1us  Coding  LDAB #$count  DELAY: DECB  BNE DELAY  Time delay = 1us+(1us+1.5us)*count 10/20/2015ECE265 15

16 More calculation  Most times you will know to time delay that you need and must calculate what count will create a loop with the correct delay.  Time Delay – LDAB time  Count = DECB time + BNE time  Taking into account the MCUs clock frequency which then tells us the time for the instructions.  Count = (Time Delay – 1us) / (2.5 us) 10/20/2015ECE265 16

17 Simple Branches summary  Branch on Carry Set of Carry Clear  BCS BCC  Branch on Zero  Equal to zero – BEQ Not Equal to zero – BNE  Branch on Minus – BMI  Branch on Plus – BPL  Branch on Overflow clear or set  BVC BVS 10/20/2015ECE265 17

18 Unsigned Binary Branches  Branch if higher BHI  CMPA $D380 compares A to the contents of $D380  BHI will branch if A > $D380 i.e. A > M  Branch on higher or same BHS  BHI is >  BHS is a  test  Branch if lower BLO <  Branch if lower or equal BLS  10/20/2015ECE265 18

19 Signed Branches  These branches treat the data as 2’s complement  Branch if greater than BGT  Branch is greater than or equal BGE  Branch is less than BLT  Branch is less than or equal BLE 10/20/2015ECE265 19

20 Jump and Branch always  Sometimes called unconditional branches  Transfers control to the location specified in the argument of the instruction.  Jump, JMP, uses direct, extended, or indexed addressing for the target address  Branch always – BRA – us a relative transfer 10/20/2015ECE265 20

21 Subroutines  High level languages and good programming practice use subroutines.  The 68HC11 has two branches to subroutine  and one return from subroutine  The BSR is a relative branch to subroutine 10/20/2015ECE265 21

22 The effect of the JSR,BSR & RTS  Instruction and their effect  JSR shows the effect of the addressing mode 10/20/2015ECE265 22

23 Lecture summary 10/20/2015ECE265 23  Have covered the remaining instructions  Now knowing the instruction set, the processor may be used in applications  To do that you need a program.  How do you design a program?  How do you design a well documented, understandable and maintainable program?

24 Assignment 10/20/2015ECE265 24  Problems Chapter 3 page 87  Problem 28


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