1. Number Representation Part 2 Floating Point Representations Little-Endian vs. Big-Endian Representations Galois Field Representations ECE 645: Lecture 2

2. Required Reading Chapter 17, Floating-Point Representations Behrooz Parhami, Computer Arithmetic: Algorithms and Hardware Design J-P. Deschamps, G. Bioul, G. Sutter, Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems, Chapter 3.3, Real Numbers Recommended Reading

3. (to be covered at the next lecture) Chapter 5, Basic Addition and Counting Behrooz Parhami, Computer Arithmetic: Algorithms and Hardware Design J-P. Deschamps, G. Bioul, G. Sutter, Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems, Chapter 4.1.1 Basic Algorithm Chapter 11.1 Basic Adder Chapter 11.2 Carry-Chain Adder

4. Floating Point Representations

9. The ANSI/IEEE standard floating- point number representation formats Originally IEEE 754-1985. Superseded by IEEE 754- 2008 Standard.

12. Table 17.1 Some features of the ANSI/IEEE standard floatingpoint number representation formats

13. 00017FFEFF7E80 01127254255126128 –1260+127–1+1 Decimal code Hex code Exponent value f = 0: Representation of  0 f  0: Representation of denormals, 0.f  2 –126 f = 0: Representation of  f  0: Representation of NaNs Exponent encoding in 8 bits for the single/short (32-bit) ANSI/IEEE format 1.f  2 e Exponent Encoding

16. Fig. 17.4 Denormals in the IEEE single-precision format.

17. The IEEE 754-2008 standard includes five rounding modes: Round to nearest, ties away from 0 (rtna) Round to nearest, ties to even (rtne) [default rounding mode] Round toward zero (inward) Round toward +  (upward) Round toward –  (downward) Rounding Modes

18. Round to Nearest Number Fig. 17.7 Rounding of a signed- magnitude value to the nearest number. Rounding has a slight upward bias. Consider rounding (x k–1 x k–2... x 1 x 0. x –1 x –2 ) two to an integer (y k–1 y k–2... y 1 y 0. ) two The four possible cases, and their representation errors are: x –1 x –2 Round Error 00 down 0 01 down–0.25 10 up 0.5 11 up 0.25 With equal prob., mean = 0.125 For certain calculations, the probability of getting a midpoint value can be much higher than 2 –l rtna(x)

20. Directed Rounding: Motivation We may need result errors to be in a known direction Example: in computing upper bounds, larger results are acceptable, but results that are smaller than correct values could invalidate the upper bound This leads to the definition of directed rounding modes upward-directed rounding (round toward +  ) and downward-directed rounding (round toward –  ) (required features of IEEE floating-point standard)

21. Directed Rounding: Visualization Fig. 17.12 Upward-directed rounding or rounding toward + . Fig. 17.6 Truncation or chopping of a 2’s-complement number (same as downward- directed rounding).

23. Requirements for Arithmetic Results of the 4 basic arithmetic operations (+, , ,  ) as well as square- rooting must match those obtained if all intermediate computations were infinitely precise That is, a floating-point arithmetic operation should introduce no more imprecision than the error attributable to the final rounding of a result that has no exact representation (this is the best possible) Example: (1 + 2  1 )  (1 + 2  23 ) Rounded result1 + 2  1 + 2  22 Error = ½ ulp Exact result1 + 2  1 + 2  23 + 2  24

24. New IEEE 754-2008 Standard Basic Formats

25. New IEEE 754-2008 Standard Binary Interchange Formats

26. Little-Endian vs. Big-Endian Representation of Integers

27. Little-Endian vs. Big-Endian Representation A0 B1 C2 D3 E4 F5 67 89 16 LSB MSB MSB = A0 B1 C2 D3 E4 F5 67 LSB = 89 Big-Endian Little-Endian LSB = 89 0 MAX 67 F5 E4 D3 C2 B1 MSB = A0 address

28. Little-Endian vs. Big-Endian Camps Big-Endian Little-Endian 0 MAX address MSB LSB... LSB MSB... Motorola 68xx, 680x0 Intel IBM Hewlett-Packard DEC VAX Internet TCP/IP Sun SuperSPARC Bi-Endian Motorola Power PC Silicon Graphics MIPS RS 232 AMD

29. Origin of the terms Little-Endian vs. Big-Endian Jonathan Swift, Gulliver’s Travels A law requiring all citizens of Lilliput to break their soft-eggs at the little ends only A civil war breaking between the Little Endians and the Big-Endians, resulting in the Big Endians taking refuge on a nearby island, the kingdom of Blefuscu Satire over holy wars between Protestant Church of England and the Catholic Church of France

31. Little-Endian vs. Big-Endian Big-EndianLittle-Endian easier to determine a sign of the number easier to compare two numbers easier to divide two numbers easier to print easier addition and multiplication of multiprecision numbers Advantages and Disadvantages

32. Pointers (1) 89 67 F5 E4 D3 C2 B1 A0 Big-Endian Little-Endian 0 MAX address int * iptr; (* iptr) = 8967;(* iptr) = 6789; iptr+1

33. Pointers (2) 89 67 F5 E4 D3 C2 B1 A0 Big-Endian Little-Endian 0 MAX address long int * lptr; (* lptr) = 8967F5E4;(* lptr) = E4F56789; lptr + 1

34. Polynomial Representation of the Galois Field elements

35. Evariste Galois (1811-1832)

36. Studied the problem of finding algebraic solutions for the general equations of the degree  5, e.g., f(x) = a 5 x 5 + a 4 x 4 + a 3 x 3 + a 2 x 2 + a 1 x+ a 0 = 0 Answered definitely the question which specific equations of a given degree have algebraic solutions On the way, he developed group theory, one of the most important branches of modern mathematics.

37. Evariste Galois (1811-1832) 1829 Galois submits his results for the first time to the French Academy of Sciences Reviewer 1 Augustin-Luis Cauchy forgot or lost the communication 1830Galois submits the revised version of his manuscript, hoping to enter the competition for the Grand Prize in mathematics Reviewer 2 Joseph Fourier – died shortly after receiving the manuscript 1831Third submission to the French Academy of Sciences Reviewer 3 Simeon-Denis Poisson – did not understand the manuscript and rejected it.

38. Evariste Galois (1811-1832) May 1832 Galois provoked into a duel The night before the duel he writes a letter to his friend containing the summary of his discoveries. The letter ends with a plea: “Eventually there will be, I hope, some people who will find it profitable to decipher this mess.” May 30, 1832 Galois is grievously wounded in the duel and dies in the hospital the following day. 1843Galois manuscript rediscovered by Joseph Liouville 1846 Galois manuscript published for the first time in a mathematical journal

40. Field Set F, and two operations typically denoted by (but not necessarily equivalent to) + and * Set F, and definitions of these two operations must fulfill special conditions.

41. { set Zp={0, 1, 2, …, p-1}, + (mod p): addition modulo p, * (mod p): multiplication modulo p } Examples of fields Infinite fields Finite fields { R= set of real numbers, + addition of real numbers * multiplication of real numbers }

42. Quotient and remainder Given integers a and n, n>0  ! q, r  Z such that a = q  n + r and 0  r < n q – quotient r – remainder (of a divided by n) q = a n = a div n r = a - q  n = a – a n  n = = a mod n

43. 32 mod 5 = -32 mod 5 =

44. Integers coungruent modulo n Two integers a and b are congruent modulo n (equivalent modulo n) written a  b iff a mod n = b mod n or a = b + kn, k  Z or n | a - b

45. Laws of modular arithmetic

46. Rules of addition, subtraction and multiplication modulo n a + b mod n = ((a mod n) + (b mod n)) mod n a - b mod n = ((a mod n) - (b mod n)) mod n a  b mod n = ((a mod n)  (b mod n)) mod n

47. 9 · 13 mod 5 = 25 · 25 mod 26 =

48. Laws of modular arithmetic Modular addition Modular multiplication Regular addition Regular multiplication a+b = a+c iff b=c a+b  a+c (mod n) iff b  c (mod n) If a  b = a  c and a  0 then b = c If a  b  a  c (mod n) and gcd (a, n) = 1 then b  c (mod n)

49. Modular Multiplication: Example 18  42 (mod 8) 6  3  6  7 (mod 8) 3  7 (mod 8) x 6  x mod 8 0123456701234567 0642064206420642 x 5  x mod 8 0123456701234567 0527416305274163

50. Z[x] - polynomials with coefficients in Z, Sets of polynomials e.g., f(x) = -4 x 3 + 254 x 2 + 45 x + 7 Z n [x] - polynomials with coefficients in Z n e.g., for n=15 f(x) = 3 x 3 + 14 x 2 + 4 x + 7 Z 2 [x] - polynomials with coefficients in Z 2 e.g., f(x) = 1 x 3 + 0 x 2 + 1 x + 1 = x 3 + x + 1

51. Division of Polynomials

52. Finite sets of polynomials Z 2 [x]/f(x) - polynomials with coefficients in Z 2 of degree less than n=deg f(x) Z p [x]/f(x) - polynomials with coefficients in Z p of degree less than n=deg f(x) e.g., for f(x) = x 3 + x + 1 g 7 (x) = x 2 + x + 1 g 6 (x) = x 2 + x g 5 (x) = x 2 + 1 g 4 (x) = x 2 g 3 (x) = x + 1 g 2 (x) = x g 1 (x) = 1 g 0 (x) = 0 e.g., for f(x) = x 3 + x + 1, and p=3 g 0 (x) = 0 …. g M-1 (x) = 2x 2 + 2x + 2 Total: 3 n polynomials

53. Finite Fields = Galois Fields GF(p) GF(2 m ) Polynomial basis representation Normal basis representation Fast in hardware Arithmetic operations present in many libraries Fast squaring GF(p m ) p – prime p m – number of elements in the field Most significant special cases

54. Elements of the Galois Field GF(2 m ) Binary representation (used for storing and processing in computer systems): Polynomial representation (used for the definition of basic arithmetic operations): A = (a m-1, a m-2, …, a 2, a 1, a 0 ) a i  {0, 1} A(x) =  a i  x i = a m-1  x m-1 + a m-2  x m-2 + …+ a 2  x 2 + a 1  x+a 0  multiplication + addition modulo 2 (XOR) i=0 m-1

55. Addition and Multiplication in the Galois Field GF(2 m ) Inputs A = (a m-1, a m-2, …, a 2, a 1, a 0 ) B = (b m-1, b m-2, …, b 2, b 1, b 0 ) a i, b i  {0, 1} Output C = (c m-1, c m-2, …, c 2, c 1, c 0 ) c i  {0, 1}

56. Addition A  A(x) B  B(x) C  C(x) = A(x) + B(x) = = (a m-1 +b m-1 )  x m-1 + (a m-2 +b m-2 )  x m-2 + …+ + (a 2 +b 2 )  x 2 + (a 1 +b 1 )  x + (a 0 +b 0 ) = = c m-1  x m-1 + c m-2  x m-2 + …+ c 2  x 2 + c 1  x+c 0 Addition in the Galois Field GF(2 m )  multiplication + addition modulo 2 (XOR) c i = a i + b i = a i XOR b i C = A XOR B

57. Multiplication A  A(x) B  B(x) C  C(x) = A(x)  B(x) mod P(X) = c m-1  x m-1 + c m-2  x m-2 + …+ c 2  x 2 + c 1  x+c 0 Multiplication in the Galois Field GF(2 m ) P(x) - irreducible polynomial of the degree m P(x) = p m  x m + p m-1  x m-1 + …+ p 2  x 2 + p 1  x+p 0

59. Irreducible polynomial for AES P(x) = m(x) = x 8 + x 4 + x 3 + x + 1 m=8  Galois Field GF(2 8 )

60. AES MixColumns Operation a 0,0 a 0,1 a 0,2 a 0,3 a 1,0 a 1,1 a 1,2 a 1,3 a 2,0 a 2,1 a 2,2 a 2,3 a 3,0 a 3,1 a 3,2 a 3,3 b 0,0 b 0,1 a 0,2 b 0,3 b 1,0 b 1,1 a 1,2 b 1,3 b 2,0 b 2,1 a 2,2 b 2,3 b 3,0 b 3,1 a 3,2 b 3,3 a 1,j a 0,j a 2,j a 3,j b 1,j b 0,j b 2,j b 3,j 2 3 1 1 1 2 3 1 1 1 2 3 3 1 1 2 All operations in the Galois Field GF(2 8 )

61. AES InvMixColumns Operations a 0,0 a 0,1 a 0,2 a 0,3 a 1,0 a 1,1 a 1,2 a 1,3 a 2,0 a 2,1 a 2,2 a 2,3 a 3,0 a 3,1 a 3,2 a 3,3 b 0,0 b 0,1 a 0,2 b 0,3 b 1,0 b 1,1 a 1,2 b 1,3 b 2,0 b 2,1 a 2,2 b 2,3 b 3,0 b 3,1 a 3,2 b 3,3 a 1,j a 0,j a 2,j a 3,j b 1,j b 0,j b 2,j b 3,j E B D 9 9 E B D D 9 E B B D 9 E All operations in the Galois Field GF(2 8 )

62. Multiplication by a constant in the Galois Field GF(2 8 ) Hardware 8 8 MUL GF(2 8 ) X Y C = const x0x0 x3x3 x7x7 y0y0... x0x0 x3x3 x7x7 y7y7 x4x4 8

63. Hardware implementation - MixColumns architecture mul_03 of mul_03 is begin output(7) <= input(7) xor input(6); output(6) <= input(6) xor input(5); output(5) <= input(5) xor input(4); output(4) <= input(4) xor input(3) xor input(7); output(3) <= input(3) xor input(2) xor input(7); output(2) <= input(2) xor input(1); output(1) <= input(1) xor input(0) xor input(7); output(0) <= input(0) xor input(7); end mul_03; b0 <= a0_02 xor a1_03 xor a2 xor a3;

64. Hardware implementation - InvMixColumns architecture mul_0E of mul_0E is begin output(7) <= input(7) xor input(6) xor input(5) xor input(4); output(6) <= input(6) xor input(5) xor input(4) xor input(3) xor input(7); output(5) <= input(5) xor input(4) xor input(3) xor input(2) xor input(6); output(4) <= input(4) xor input(3) xor input(2) xor input(1) xor input(5); output(3) <= input(3) xor input(2) xor input(1) xor input(0) xor input(6) xor input(5); output(2) <= input(2) xor input(1) xor input(0) xor input(6); output(1) <= input(1) xor input(0) xor input(5); output(0) <= input(0) xor input(7) xor input(6) xor input(5); end mul_0E; b0 <= a0_0E xor a1_0B xor a2_0D xor a3_09; Conclusion: In hardware, InvMixColumns slower than MixColumns