Presentation is loading. Please wait.

Presentation is loading. Please wait.

Zvi Kohavi and Niraj K. Jha 1 Multi-level Logic Synthesis.

Similar presentations


Presentation on theme: "Zvi Kohavi and Niraj K. Jha 1 Multi-level Logic Synthesis."— Presentation transcript:

1 Zvi Kohavi and Niraj K. Jha 1 Multi-level Logic Synthesis

2 2 Logic Synthesis Technology-independent: Optimize circuit for targeted design objective using laws of Boolean Algebra Example objective: minimize area under a delay constraint Apply following logic transformations iteratively: preserves input/output behavior of circuits –Factoring –Decomposition –Extraction –Substitution –Elimination Technology-dependent: map resultant circuit to a library of gates available for the given semiconductor technology

3 3 Factoring Factoring: converts a sum-of-products expression to an expression with multiple levels without introducing any subfunctions Factored form: a recursive sum-of-products representation Example: Factor f = uvxz + wxz + u’y’z + v’x’z’ + v’yz’ Literal-count of factored form: 11 (reduced from 16)

4 4 Decomposition Decomposition: replaces a factored switching expression with a set of new expressions Example: Factored expression f = z(x(uv + w) + u’y’) + (x’ + y)v’z’ can be decomposed as f 1 = uv + w f 2 = x’ + y f 3 = v’z’ f 4 = xf 1 + u’y’ f = f 2 f 3 + zf 4 Literal-count: 15

5 5 Extraction Extraction: extracts common subexpressions from two or more expressions in factored form Example: Consider f 1 = (uv + w)x + u’y’ f 2 = (uv + w)z After extraction: f 1 = f 3 x + u’y’ f 2 = f 3 z f 3 = uv + w Literal-count: reduces from 10 to 9

6 6 Substitution Substitution: replaces a subexpression in expression f with a variable g corresponding to a node in the network graph g is substituted into f, or f is expressed in terms of g Example: Consider f 1 = uvx + wx + u’y’ f 2 = uv + w After substitution: f 1 = f 2 x + u’y’ Literal-count: reduces from 10 to 7

7 7 Elimination Elimination: eliminates an internal node from the network graph Example: Consider f 1 = x + f 2 f 2 = y + z After elimination: if f 2 not needed elsewhere f 1 = x + y + z Literal-count: reduces from 4 to 3

8 8 Techniques for Factoring Algebraic expression: no implicant of the expression contains another implicant Example: x + yz Boolean expression: an expression that does not satisfy above condition Example: x + xy Operations on algebraic expressions simpler: can be treated similarly to multiplication and division of polynomials Disadvantage: prevents exploitation of all laws of Boolean Algebra –Idempotency, dual of distributivity [x + yz = (x + y)(x + z)], and absorption cannot be used as they do not have an analog in conventional polynomial algebra –Complementation (x + x’ = 1 and xx’ = 0), involution and De Morgan’s theorem cannot be used since complements are not defined in polynomial algebra –Complemented literals are deemed to be unrelated to uncomplemented literals

9 9 Algebraic Factored Form Factored form: Algebraic if multiplication of its terms yields an algebraic sum-of-products expression without the use of above-mentioned laws Boolean otherwise Example: Factored form (w+x)(y+z) is algebraic since wy + wz + xy + xz is algebraic Example: Factored form (w + yz)(x + yz) is not algebraic, but Boolean, because wx + wyz + xyz + yzyz is not algebraic yzyz cannot be simplified because idempotency cannot be used This term is not allowed to absorb xyz since absorption law is not allowed Example: (x + y)(x’ + z) is not algebraic since multiplying it out gives xx’ which cannot be simplified further

10 10 Division Operation Division operation: f = f d f q + f r f d : divisor f q : quotient f r : remainder Algebraic division: if f d and f q have no variables in common Else, Boolean division f d : correspondingly an algebraic or Boolean divisor If f r = 0: f d correspondingly an algebraic or Boolean factor Example: Let f 1 = vx + vy + wx + wy + z = (v + w)(x + y) + z Algebraic divisor: (v + w) Quotient: (x + y) Remainder: z

11 11 Division Operation (Contd.) Example: Let f 2 = vx + vy + wx + wy = (v + w)(x + y) Algebraic factors: (v + w), (x + y) Example: Let f 3 = w + xy + z = (w + x)(w + y) + z Boolean divisors: (w + x), (w + y) Example: Let f 4 = w + xy = (w + x)(w + y) Boolean factors: (w + x), (w + y) Example: Let f 5 = xy + xz + yz Factored form 1: x(y + z) + yz Factored form 2: (x + y)z + xy Factored form 3: (x + z)y + xz

12 12 Algebraic Kernels and Co-kernels Cube-free expressions: one that cannot be factored by a cube Example: wx + yz is cube-free Example: xy + xz is not cube-free since it can be factored by x Example: xyz is not cube-free since it can be factored by its literals Kernel and co-kernel: if an expression divided by a cube results in a cube- free quotient, then the quotient is called a kernel and the cube the corresponding co-kernel Level-0 kernel: a kernel that has no kernel except itself Level-n kernel: has at least one kernel of level n-1, but no kernel of level n or greater except itself Co-kernel level: same as its kernel’s

13 13 Kernels and Co-kernels (Contd.) Example: f = uwz + uxz + vwz + vxz + yz + uv

14 14 Rectangle Covering Consider a sum-of-products expression f with p cubes and q distinct literals p x q cube-literal incidence matrix: element (i,j) = 1 if j th literal used in the i th cube, and 0 otherwise Rectangle (r,c) of matrix: set of rows r and columns c in which all entries are 1 (r 1,c 1 ) contains (r 2,c 2 ) if r 1 r 2 and c 1 c 2 Prime rectangle: a rectangle not strictly contained in another rectangle Co-rectangle of (r,c): (r,c) where c is the complement of column subset c

15 15 Rectangle Covering (Contd.) Example: Let f = uwz + uxz + yz + uv It has four cubes and six distinct literals Cube-literal incidence matrix: Prime rectangle: ({uwz,uxz}, {u,z}) –Co-kernel: uz –Co-rectangle: ({uwz,uxz}, {v,w,x,y}) »Kernel: w + x, obtained by restricting uwz + uxz to literals in {v,w,x,y} Other prime rectangles: ({uwz,uxz,uv}, {u}), ({uwz,uxz,yz}, {z})

16 16 A Factoring Approach Start with a sum-of-products and derive a factored form to reduce literal- count: Let f = f d f q + f r Recursively factor f d, f q, and f r into their factored forms until these forms cannot be factored any more Extract any common subexpressions from the quotient and part of the remainder Example: Let f = uwz + uxz + vwz + vxz + yz + uv Dividing by kernel (u + v): f = (u + v)(wz + xz) + yz + uv –f d = (u + v), f q = wz + xz, and f r = yz + uv f d and f r cannot be factored any further, but f q can be: –f = (u + v)(w + x)z + yz + uv Further factoring by extracting z: –f = ((u + v)(w + x) + y)z + uv Literal-count: reduced from 16 to 8

17 17 Extraction For two or more expressions with common divisors: divisors can be extracted using rectangle covering Cube extraction Kernel extraction Cube extraction: Form an auxiliary expression f a as the sum of all expressions in the logic network Obtain a cube-literal incidence matrix for f a Tag each cube of each expression with an identifier for that expression Find a prime rectangle

18 18 Extraction Example Example: Let f 1 = uwz + uxz + yz + uv and f 2 = vz + wyz f a = f 1 + f 2 = uwz + uxz + yz + uv + vz + wyz Cube-literal incidence matrix: Prime rectangle: ({yz, wyz}, {y,z}) with corresponding cube yz Extract yz: Since literal-count remains at 15 after extraction: not an attractive step in this case

19 19 Kernel Extraction Kernel extraction: Define a kernel-cube incidence matrix Represent each cube in a kernel with a new variable Represent a kernel by a set of such variables Denote set of kernels for expression f i by K(f i ) Example: Let f 1 = uwz + uxz + yz and f 2 = vw + vx + vyz From their cube-literal incidence matrices: –K(f 1 ) = {(w + x), (uw + ux + y)} –K(f 2 ) = {(w + x + yz)} Let a w = w, a x = x, a y = y, a uw = uw, a ux = ux, a yz = yz –Thus, K(f 1 ) = {{a w, a x }, {a uw, a ux, a y }} –K(f 2 ) = {{a w, a x, a yz }} Next, form an auxiliary function f a –f a = a w a x + a uw a ux a y + a w a x a yz

20 20 Kernel-cube Incidence Matrix Kernel-cube incidence matrix: cubes represent kernels and columns denote new variables Element (i,j) is 1 if j th new variable is used in the i th cube, 0 otherwise Prime rectangle corresponds to kernel intersection If the rows of such a rectangle correspond to different expressions, the intersection corresponds to the subexpression that can be extracted Example: Again, let f 1 = uwz + uxz + yz and f 2 = vw + vx + vyz Prime rectangle: ({a w a x, a w a x a yz }, {a w, a x }) Corresponds to kernel intersection (w + x), which can be extracted Literal-count: reduces from 15 to 12 f 1 and f 2 can be factored again to reduce literal-count to 10

21 21 Decomposition and Substitution Decomposition: helps reduce size of a complex expression to more manageable size implementable with standard logic cells Assume algebraic factoring: f = f d f q + f r Decomposition represents f d by a: reducing f to af q + f r and a = f d Then decomposition can be carried out recursively on the divisor, quotient and remainder Example: Let f = xz + yz + wx + wy + vw and consider divisor x + y f = aw + az + vw a = x + y Decomposing the quotient next: f = ab + vw a = x + y b = w + z

22 22 Decomposition and Substitution (Contd.) End product of decomposition: depends on choice of divisor Evaluate all kernels: choose the one that reduces literal-count the most Faster alternative: consider level-0 kernels only Substitution: Process of replacing the divisor by corresponding variable Divisor x + y was replaced by variable a: this was substituted into f Thus, decomposition and substitution go hand in hand If a divisor of f is also a divisor of g: corresponding variable can be substituted in both f and g

23 23 Technology Mapping Technology mapping: mapping of circuit components after technology- independent logic synthesis to logic cells in a cell library Possible objectives: minimize area (delay) under delay (area) constraints Example: Cell library: INV, NAND2, NAND3 with area costs of 1, 2, 3

24 24 Definitions Network covering: process of replacing subnetworks with logic cells such that the whole network is covered and desired objective is met Matching: a cell matches a subnetwork if they are functionally equivalent Subject graph: logic network converted into a graph with nodes derived from a set of base functions, e.g., (inverter, two-input NAND) Pattern graph: implementation of cell library with base functions

25 25 Area-delay Costs of Pattern Graphs Network cover: ensemble of pattern graphs with minimum cost that collectively matches every node in the subject graph

26 26 Decomposing a Network into Base Functions For decomposition: base functions must obviously be functionally complete and supported by the cell library (INV, OR2, AND2) (INV, NAND2) (INV, NOR2) Trivial network cover: map each node in the subject graph to the cell that implements that base function

27 27 Partitioning a Network into Subject Graphs Network decomposed into base functions: subsequent technology mapping cumbersome Partition network into a set of connected subject graphs –Use subnetworks called leaf-DAGs »Leaf-DAG has no internal fanout »Thus, fanout points form the boundaries of a partition Subject each subject graph to matching and network covering Example:

28 28 Obtaining Matches Obtain all possible ways in which pattern graphs match each node in the subject graph Tree matching: when all pattern graphs are trees (do not have fanout even at their primary inputs) Example: Tree matching

29 29 Obtaining the Network Cover Choose one match at each node in the subject graph to obtain the network cover to minimize some cost Optimum method: dynamic programming Traverse subject graph from primary inputs to output and choose the best match for each node Example: Optimum area cost

30 30 Obtaining the Network Cover (Contd.) Example: Optimum delay cost


Download ppt "Zvi Kohavi and Niraj K. Jha 1 Multi-level Logic Synthesis."

Similar presentations


Ads by Google