1. NATIONAL POLYTECHNIC INSTITUTE COMPUTING RESEARCH CENTER IPN-CICMICROSE Lab Design of a Multimedia Extension for RISC Processor Ing. Eduardo Jonathan Martínez Montes Ph.D. Marco Antonio Ramírez Salinas

2. I.Thesis Requirements 1.Committee Tutorial 2. Objective II.Overview 1.SIMD vs SISD III. Back to basics 1.The adder 2.Ripple carry adder 3.Carry look ahead adder 4.Kogge Stone adder 5.Adders comparison OUTLINEPart 1 IPN-CICMICROSE Lab2 IV. Using the adder 1.Adder substracter 8 bits 2.Adder substracter 16 bits 3.Example 4.Multiplier 8 bits 5.Multiplier 16 bits 6.Example multiplier

3. V.MIPS Digital Media Extension I.Features II.Register File III.Decode IV.Vector to vector arithmetic V.Oct Byte Format VI.Quad Half Format VII.Instruction Path VIII.Prototype VI.Team Work 1.Linux for MIPS VII.Future Work 1.MDMX ISA 2.Work Schedule IPN-CICMICROSE Lab3 OUTLINEPart 2

4. IPN-CICMICROSE Lab4 THESIS REQUIREMENTSCommittee Tutorial NameExpertise Area Ph.D. Marco Antonio Ramírez SalinasComputer Architecture Ph.D. Luis Alfonso Villa VargasComputer Architecture Ph.D. Herón Molina LozanoVLSI Ph.D. José Luis Oropeza RodríguezOperating Systems

5. IPN-CICMICROSE Lab5 THESIS REQUIREMENTSObjective General Objective Design a multimedia extension unit for a RISC processor (Alligator). Specific Objectives  Design a vector adder with saturation arithmetic.  Design a multiplier with saturation arithmetic.  Implement all the Instruction set of the MIPS Digital Media extension (MDMX).

6. IPN-CICMICROSE Lab6 REVIEWSIMD vs SISD

7. IPN-CICMICROSE Lab7 BACK TO BASICSThe Adder A full adder is an arithmetic circuit that is used to add three bits. Logic diagramBlock diagram Boolean functions

8. IPN-CICMICROSE Lab8 Ripple Carry Adder (part 1) The carry propagation time is the major speed limiting factor. BACK TO BASICS

9. IPN-CICMICROSE Lab9 Ripple Carry Adder (part 2)BACK TO BASICS

10. IPN-CICMICROSE Lab10 Ripple Carry Adder (part 3)BACK TO BASICS Features Resources: 35 LEFmax: 208.90 MHz Size: 16 bits

11. IPN-CICMICROSE Lab11 Carry Look Ahead Adder (part 1) It improves speed by reducing the amount of time required to determine carry bits. BACK TO BASICS

12. IPN-CICMICROSE Lab12 Carry Look Ahead Adder (part 2)BACK TO BASICS

13. IPN-CICMICROSE Lab13 Carry Look Ahead Adder (part 3)BACK TO BASICS Features Resources: 57 LEFmax: 223.51 MHz Size: 16 bits

14. IPN-CICMICROSE Lab14 Kogge Stone Adder (part 1) It is widely considered the fastest adder design possible. BACK TO BASICS

15. IPN-CICMICROSE Lab15 Kogge Stone Adder (part 2) Black Cell Gray Cell BACK TO BASICS

16. IPN-CICMICROSE Lab16 Kogge Stone Adder (part 3)BACK TO BASICS Features Resources: 82 LEFmax: 255.17 MHz Size: 16 bits

17. IPN-CICMICROSE Lab17 Adders ComparisonBACK TO BASICS

18. IPN-CICMICROSE Lab18 USING THE ADDERAdder Substracter Saturated/Wrapped 8 bits Features Operations: Adder, SubstracterArithmetic: Saturated, Wrapped Size: 8 bitsUnsigned Integer Resources: 59 LEFmax: 247.46 MHz

19. IPN-CICMICROSE Lab19 Adder Substracter Saturated/Wrapped 16 bits Features Operations: Adder, SubstracterArithmetic: Saturated, Wrapped Size: 16 bitsSigned Integer Resources: 113 LEFmax: 197.55 MHz USING THE ADDER

20. IPN-CICMICROSE Lab20 Adder Substracter Example Operations Example Operations *Saturation arithmetic: all operations such as addition and multiplication are limited to a fixed range between a minimum and maximum value. USING THE ADDER

21. IPN-CICMICROSE Lab21 Multiplier 8x8 Features Operations: MultiplierArithmetic: Saturated, Wrapped Size: 8x8=16 bitsUnsigned Integer Resources: 308 LEFmax: 287.85 MHz USING THE ADDER

22. IPN-CICMICROSE Lab22 Multiplier 16x16 Features Operations: MultiplierArithmetic: Saturated, Wrapped Size: 16x16=32 bitsSigned Integer Resources: 1,723 LEFmax: 222.82 MHz USING THE ADDER

23. IPN-CICMICROSE Lab23 Example Operations *Saturation arithmetic: all operations such as addition and multiplication are limited to a fixed range between a minimum and maximum value. Multipliers Example OperationsUSING THE ADDER

24. IPN-CICMICROSE Lab24 MIPS Digital Media ExtensionFeatures  MDMX supports video, audio, and graphics pixel processing.  MDMX is not part of the MIPS Instruction Set.  A processor that implements the MDMX must implement the MIPS-V ISA  MIPS MDMX is not intended for general purpose computing.  Software support is via shared libraries and assembly language only.

25. IPN-CICMICROSE Lab25 MIPS Digital Media ExtensionRegister files  MDMX shares a register file with the Floating Point Unit.  Data is moved between the shared register file and memory with existing Floating Point Load and Store double operations.  Registers are interpreted in two formats: Quad Half and Oct Byte.  MDMX also shared the 8 Floating Point Condition Code bites.  MDMX has a private 192 bit accumulator register.

26. IPN-CICMICROSE Lab26 DecodeMIPS Digital Media Extension

27. IPN-CICMICROSE Lab27 Vector to vector arithmeticMIPS Digital Media Extension

28. IPN-CICMICROSE Lab28 Oct Byte Format  Unsigned.  64 bits vector  8 elements each one 8 bits  Accumulator contains 8 24 bits elements. MIPS Digital Media Extension

29. IPN-CICMICROSE Lab29 Quad Half Format  Signed.  64 bits vector  4 elements each one 16-bits  Accumulator contains 4 48-bits elements. MIPS Digital Media Extension

30. IPN-CICMICROSE Lab30 Instruction pathMIPS Digital Media Extension

31. IPN-CICMICROSE Lab31 Prototype Features Resources: 8,449 LEFmax: 176.27 MHz ADD, ADDL, ADDASUB, SUBL, SUBA MUL, MULL, MULALDC2, SDC2 No LPM MIPS Digital Media Extension

32. IPN-CICMICROSE Lab32 Linux for MIPS (part 1)TEAM WORK

33. IPN-CICMICROSE Lab33 Linux for MIPS (part 2)TEAM WORK

34. IPN-CICMICROSE Lab34 Linux for MIPS (part 3)TEAM WORK

35. IPN-CICMICROSE Lab35 FUTURE WORKMDMX ISA

36. IPN-CICMICROSE Lab36 Work ScheduleFUTURE WORK

37. IPN-CICMICROSE Lab37 Q&A