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Design of 3.67 GHz RF Power Amplifier Presenters: Akshay Iyer, Logan Woodcock Advisers: Dr. K. Koh, Yahya Mortazavi.

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Presentation on theme: "Design of 3.67 GHz RF Power Amplifier Presenters: Akshay Iyer, Logan Woodcock Advisers: Dr. K. Koh, Yahya Mortazavi."— Presentation transcript:

1 Design of 3.67 GHz RF Power Amplifier Presenters: Akshay Iyer, Logan Woodcock Advisers: Dr. K. Koh, Yahya Mortazavi

2 Cognitive Radios ●Software defined radio ●Programmed to run by maximizing utility of radio frequency spectrum

3 Project Goal ●Design and simulate an RF power amplifier that operates between 2 and 4 GHz ●Use ADS software for design and simulation PA Digital Baseband Processor Digital to Analog Converter Modulator Frequency Synthesizer (Oscillator) Antenna (T x ) Receiver (R x )

4 RF Power Amplifier (PA) ●T x side: Increases the signal amplitude to make it more easily detected Input Matching Network Output Matching Network RF In RF Out Drain Source Voltage MOSFET Transistor Gate Source Voltage Source Load

5

6 Metal-Oxide Semiconductor Field- Effect Transistor ●Creates a channel underneath the gate that connects the source and drain terminals ●Channel is created when a large enough voltage is supplied to the gate

7 Smith Charts Used for Impedance Matching (Max Power Transfer)

8 Transmission Line Theory Input Impedance Special Cases: Open/Short Circuit Stubs

9 Amplifier Classes ●A, AB, B, C, F o Phase angles

10 “Load Line” “Q - Point” - DC Operating Point DC+AC conditions: Vds=Vdd+Vac (time average of Vds must be Vdd) Vac=Vout Id=Iddc+Idac Idac=-Iload=-Vout/RL

11 Final Schematic ●Consists of two bias networks, two impedance matching networks, and a MOSFET designed by Freescale.

12 Transistor and Substrate ●Freescale Model MRF8S26060H ●Rogers Substrate

13 ●Class AB o utilizes harmonics ●VDS of 50 V, VGS of 2 V Load Line / FET Curves Results

14 Power Results ●Max Power Added Efficiency (PAE) of 88%

15 Bias Networks ●Necessary to bias the transistor to desired level

16 Load-Pull ●Shows impedance values specific to schematic

17 Impedance Matching Networks 1. Shunt 2. Series Electrical Length (degrees)

18 Harmonic Balance Simulation ●Shows the effects of harmonics on output power o Increases efficiency

19 Scattering - Parameters ●Voltage reflection coefficients o Shows reflected voltage (return loss)

20 Further Steps in the Process - Layout - EM simulation - Foundry mwrf.com

21 References G. Saggio, Principles of analog electronics, Edition of book, Boca Raton: Taylor & Francis Group, 2014, p.. B. Razavi, RF microelectronics, 2nd ed., New Delhi: Dorling Kindersley India, 2012, p. 767-847.


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