1. Founder’s Day University of Portland School of Engineering

2. CS-EE 481  Introduction Dan Allenby  Background Dan Allenby  Methods Ross Yamaguchi  Results Kyle Yakubisin  Conclusions Preston Boyd  Demonstration Team Redwood Founder’s Day University of Portland School of Engineering

3. CS-EE 481 Founder’s Day University of Portland School of Engineering Team Redwood’s Concept: –Chose to integrate electrical engineering with human physiology. –In what manner to do this. –Heart health is significant in everyday life. HR max = 220 − Age

4. CS-EE 481 The Idea: –Heart Rate Monitor Founder’s Day University of Portland School of Engineering

5. CS-EE 481 The Goal: -Measure a user’s heart rate using advanced technology commonly found in the industry. -Calculate heart rate and display accurate values in an easily readable format. - Analog input – Digital processing – Analog output. Founder’s Day University of Portland School of Engineering

6. CS-EE 481 Founder’s Day University of Portland School of Engineering  Determine the scope of the project  Began conceptualizing in May 2009  Determine the functionality of the project  Conventional measurement  Accurately calculate user’s heart rate  Easily visible display  Updates every second  How do we produce this functionality  Choose to utilize MOSIS technology

7. CS-EE 481 Founder’s Day University of Portland School of Engineering  Integration of all parts into a single unit  Make analog circuitry compatible with MOSIS  Testing and De-bugging  Check and Recheck  Adjust design for unforeseen complications

8. CS-EE 481 Founder’s Day University of Portland School of Engineering

9. CS-EE 481  Sp02 Sensor Records the amount of hemoglobin in red blood cells that pass through the user’s finger. The sensor generates a current that fluctuates with each heartbeat.  Analog Signal Processing Circuits The information from the fingertip sensor must then be characterized and processed by analog circuitry consisting of several 741 op amps and a Schmitt Trigger. Founder’s Day University of Portland School of Engineering

10. CS-EE 481  Analog Signal Processing Circuits (cont’d) These components interface to characterize the signal from the Sp02 sensor into a format that the MOSIS Chip can calculate.  MOSIS Calculates the user’s heart rate and outputs to the LED drivers in a beats per minute format.  LED Used to display the user’s calculated heart rate. Founder’s Day University of Portland School of Engineering

11. CS-EE 481  Analog Circuit Schematic Founder’s Day University of Portland School of Engineering

12. CS-EE 481

13.  Input is 1-bit signal from Analog Signal Processing Circuits  Calculates and Controls Desired Output  Output is Three 4-bit BCD Digits that are sent to the display

14. CS-EE 481 11-Bit Counter 11-Bit Register Z -1 Sampler Divider Unit Beat Comparator If beats <= 230 12-Bit Register 10-Bit Counter Heart Rate Clock Binary to BCD Converter Sampler

15. CS-EE 481 BEAT BEAT PULSE Time

16. CS-EE 481 11-Bit Counter 11-Bit Register Z -1 Sampler Divider Unit Beat Comparator If beats <= 230 12-Bit Register 10-Bit Counter Heart Rate Clock Binary to BCD Converter

17. CS-EE 481 32-Bit Divisor Register 32-Bit Remainder Register 32-Bit Subtraction 32-Bit Multiplexer 16-Bit Quotient Register 8-Bit Output Register 5-Bit Counter Beats Clock Reset IF HR=0IF HR=E Heart Rate

18. CS-EE 481 System Clock Frequency = 960 Hz Beats = Clock cycles between pulses

19. CS-EE 481

20. TI Driver 8 8 8 HR0_(0-3) HR1_(0-3) HR2_(0-3) 7-Bit Signal DriversDisplays MOSIS Heart Rate Calculator and Output Controller

21. CS-EE 481 Founder’s Day University of Portland School of Engineering

22. CS-EE 481 Founder’s Day University of Portland School of Engineering

23. CS-EE 481 University of Portland School of Engineering Founder’s Day System Results

24. CS-EE 481 Founder’s Day University of Portland School of Engineering

25. CS-EE 481  Heart Rate Monitor  We have some error caused by noise  All of the sections spoken about earlier came together to create this prototype  Advice to juniors and sophomores  The early and hard deadline of MOSIS was very nice  Try to get ahead whenever possible  Plan & allow for plenty of time to get tasks done Founder’s Day University of Portland School of Engineering

26. CS-EE 481  If we had more time:  We would like to further clean up the signal  Improve the accuracy of the system clock Thus, improving the accuracy of the entire system.  Possible continuation projects:  Calculate & display the user’s %Sp02  Wearable size and power source Founder’s Day University of Portland School of Engineering

27. CS-EE 481  Dr. Joseph Hoffbeck  Dr. Peter Osterberg  Andrew Owings of Nike  Grant from the MOSIS Educational Program (MEP)  To everyone else that assisted us in any way Founder’s Day University of Portland School of Engineering

28. CS-EE 481 Founder’s Day University of Portland School of Engineering

29. Are there any questions? Founder’s Day University of Portland School of Engineering

30. CS-EE 481

31. 11-Bit Counter 11-Bit Register Z -1 Sampler Divider Unit Beat Comparator If beats <= 230 12-Bit Register 10-Bit Counter Heart Rate Clock Binary to BCD Converter

32. CS-EE 481  Counts from 0 to 2047 then halts.  If value is 2047 control signal is sent to Output Register so output is set to zero.  Beat Pulse loads current value of counter to register then resets the counter to zero.

33. CS-EE 481

34. 11-Bit Counter 11-Bit Register Z -1 Sampler Divider Unit Beat Comparator If beats <= 230 12-Bit Register 10-Bit Counter Heart Rate Clock Binary to BCD Converter

35. CS-EE 481  11-Bit Value representing the clock cycles from last count is inputed.  If input is less than 230 then control signal is set to logic high.  An input less than 230 represents an error.

36. CS-EE 481 Start 1. Subtract the Divisor register from the Remainder register and place the result in the Remainder register. Test Remainder 2a. Shift the Quotient register to the left, setting the most significant bit to 1 2b. Restore the original value by adding the Divisor register to the Remainder register and place the sum in the Remainder register. Also shift the Quotient register to the left, setting the new least significant bit to 0 3. Shift the Divisor register right 1 bit 17 th repetition? Done No: < 17 Repetitions Yes: 17 repetitions Remainder ≥ 0 Remainder < 0

37. CS-EE 481 11-Bit Counter 11-Bit Register Z -1 Sampler Divider Unit Beat Comparator If beats <= 230 12-Bit Register 10-Bit Counter Heart Rate Clock Binary to BCD Converter

38. CS-EE 481  Converts 8-Bit binary value to Binary Coded Decimal.  Each block is a conditional adder.  If input is >= 5 then 3 is added to value, else the input is copied to the output.

39. CS-EE 481