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Chapter 6: Field-Effect Transistors. Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved. Electronic Devices.

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Presentation on theme: "Chapter 6: Field-Effect Transistors. Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved. Electronic Devices."— Presentation transcript:

1 Chapter 6: Field-Effect Transistors

2 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky Similarities: Amplifiers Switching devices Impedance matching circuitsDifferences: FETs are voltage controlled devices. BJTs are current controlled devices. FETs have a higher input impedance. BJTs have higher gains. FETs are less sensitive to temperature variations and are more easily integrated on ICs. FETs are generally more static sensitive than BJTs. FETs vs. BJTs 2

3 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky JFET:JFET: Junction FET MOSFET:MOSFET: Metal–Oxide–Semiconductor FET D-MOSFET: D-MOSFET: Depletion MOSFET E-MOSFET: E-MOSFET: Enhancement MOSFET FET Types 3

4 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky JFET Construction There are two types of JFETs n-channeln-channel p-channelp-channel The n-channel is more widely used. There are three terminals: Drain SourceDrain (D) and Source (S) are connected to the n-channel GateGate (G) is connected to the p-type material 4

5 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky JFET Operation: The Basic Idea JFET operation can be compared to a water spigot. The source The source of water pressure is the accumulation of electrons at the negative pole of the drain-source voltage. The drain The drain of water is the electron deficiency (or holes) at the positive pole of the applied voltage. The control The control of flow of water is the gate voltage that controls the width of the n-channel and, therefore, the flow of charges from source to drain. 5

6 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky JFET Operating Characteristics There are three basic operating conditions for a JFET: V GS = 0, V DS increasing to some positive value V GS < 0, V DS at some positive value Voltage-controlled resistor 6

7 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky JFET Operating Characteristics: V GS = 0 V The depletion region between p-gate and n-channel increases as electrons from n-channel combine with holes from p-gate. Increasing the depletion region, decreases the size of the n-channel which increases the resistance of the n-channel. Even though the n-channel resistance is increasing, the current (I D ) from source to drain through the n- channel is increasing. This is because V DS is increasing. Three things happen when V GS = 0 and V DS is increased from 0 to a more positive voltage 7

8 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky pinches off If V GS = 0 and V DS is further increased to a more positive voltage, then the depletion zone gets so large that it pinches off the n-channel. This suggests that the current in the n- channel (I D ) would drop to 0A, but it does just the opposite–as V DS increases, so does I D. JFET Operating Characteristics: Pinch Off 8

9 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky At the pinch-off point: V pAny further increase in V GS does not produce any increase in I D. V GS at pinch-off is denoted as V p. I DSSI D is at saturation or maximum. It is referred to as I DSS. The ohmic value of the channel is maximum. JFET Operating Characteristics : Saturation 9

10 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky JFET Operating Characteristics As V GS becomes more negative, the depletion region increases. 10

11 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky As V GS becomes more negative: The JFET experiences pinch-off at a lower voltage (V P ). I D decreases (I D < I DSS ) even though V DS is increased. Eventually I D reaches 0 A. V GS at this point is called V p or V GS(off).. JFET Operating Characteristics Also note that at high levels of V DS the JFET reaches a breakdown situation. I D increases uncontrollably if V DS > V DSmax. 11

12 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky ohmic region. The region to the left of the pinch-off point is called the ohmic region. The JFET can be used as a variable resistor, where V GS controls the drain-source resistance (r d ). As V GS becomes more negative, the resistance (r d ) increases. JFET Operating Characteristics: Voltage-Controlled Resistor 12

13 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky p-Channel JFETS The p-channel JFET behaves the same as the n-channel JFET, except the voltage polarities and current directions are reversed. 13

14 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky p-Channel JFET Characteristics Also note that at high levels of V DS the JFET reaches a breakdown situation: I D increases uncontrollably if V DS > V DSmax. As V GS increases more positively The depletion zone increases I D decreases (I D < I DSS ) Eventually I D = 0 A 14

15 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky N-Channel JFET Symbol 15

16 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky The transfer characteristic of input-to-output is not as straightforward in a JFET as it is in a BJT. In a BJT, indicates the relationship between I B (input) and I C (output). In a JFET, the relationship of V GS (input) and I D (output) is a little more complicated: JFET Transfer Characteristics 16

17 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky JFET Transfer Curve This graph shows the value of I D for a given value of V GS. 17

18 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky Using I DSS and Vp (V GS(off) ) values found in a specification sheet, the transfer curve can be plotted according to these three steps: Solving for V GS = 0VI D = I DSS Step 1 Solving for V GS = V p (V GS(off) ) I D = 0A Step 2 Solving for V GS = 0V to V p Step 3 Plotting the JFET Transfer Curve 18

19 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky JFET Specifications Sheet Electrical Characteristics 19

20 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky JFET Specifications Sheet Maximum Ratings more… 20

21 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky Case and Terminal Identification 21

22 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky Curve Tracer Curve Tracer A curve tracer displays the I D versus V DS graph for various levels of V GS. Specialized FET Testers Specialized FET Testers These testers show I DSS for the JFET under test. Testing JFETs 22

23 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky MOSFETs There are two types of MOSFETs: Depletion-TypeDepletion-Type Enhancement-TypeEnhancement-Type MOSFETs have characteristics similar to JFETs and additional characteristics that make then very useful. 23

24 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky Depletion-Type MOSFET Construction DrainSource Gate The Drain (D) and Source (S) connect to the to n-doped regions. These n- doped regions are connected via an n- channel. This n-channel is connected to the Gate (G) via a thin insulating layer of SiO 2. Substrate The n-doped material lies on a p-doped substrate that may have an additional terminal connection called Substrate (SS). 24

25 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky Basic MOSFET Operation A depletion-type MOSFET can operate in two modes: Depletion modeDepletion mode Enhancement modeEnhancement mode 25

26 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky D-Type MOSFET in Depletion Mode When V GS = 0 V, I D = I DSS When V GS < 0 V, I D < I DSS The formula used to plot the transfer curve still applies: Depletion Mode The characteristics are similar to a JFET. 26

27 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky D-Type MOSFET in Enhancement Mode V GS > 0 V I D increases above I DSS The formula used to plot the transfer curve still applies: Enhancement Mode Note that V GS is now a positive polarity 27

28 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky p-Channel D-Type MOSFET 28

29 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky D-Type MOSFET Symbols 29

30 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky Maximum Ratings more… Specification Sheet 30

31 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky Electrical Characteristics Specification Sheet 31

32 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky E-Type MOSFET Construction DrainSourceThe Drain (D) and Source (S) connect to the to n-doped regions. These n- doped regions are connected via an n- channel GateThe Gate (G) connects to the p-doped substrate via a thin insulating layer of SiO 2 There is no channel SubstrateThe n-doped material lies on a p-doped substrate that may have an additional terminal connection called the Substrate (SS) 32

33 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky Basic Operation of the E-Type MOSFET V GS is always positive As V GS increases, I D increases As V GS is kept constant and V DS is increased, then I D saturates (I DSS ) and the saturation level, V DSsat is reached The enhancement-type MOSFET operates only in the enhancement mode. 33

34 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky E-Type MOSFET Transfer Curve To determine I D given V GS : Where: V T = threshold voltage or voltage at which the MOSFET turns on k, a constant, can be determined by using values at a specific point and the formula: V DSsat can be calculated by:34

35 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky p-Channel E-Type MOSFETs The p-channel enhancement-type MOSFET is similar to the n- channel, except that the voltage polarities and current directions are reversed. 35

36 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky MOSFET Symbols 36

37 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky Maximum Ratings more… Specification Sheet 37

38 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky Electrical Characteristics Specification Sheet 38

39 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky Handling MOSFETs MOSFETs are very sensitive to static electricity. Because of the very thin SiO 2 layer between the external terminals and the layers of the device, any small electrical discharge can create an unwanted conduction.Protection Always transport in a static sensitive bag Always wear a static strap when handling MOSFETS Apply voltage limiting devices between the gate and source, such as back-to-back Zeners to limit any transient voltage. 39

40 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky VMOS Devices VMOS (vertical MOSFET) increases the surface area of the device. Advantages VMOS devices handle higher currents by providing more surface area to dissipate the heat. VMOS devices also have faster switching times. 40

41 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky Advantages Useful in logic circuit designs Higher input impedance Faster switching speeds Lower operating power levels CMOS Devices CMOS (complementary MOSFET) uses a p-channel and n-channel MOSFET; often on the same substrate as shown here. 41

42 Copyright ©2009 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Electronic Devices and Circuit Theory, 10/e Robert L. Boylestad and Louis Nashelsky Summary Table 42


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