Presentation on theme: "On The Energy Efficiency of Computation Mihai Budiu CMU CS CALCM Seminar Feb 17, 2004 Note: this version fixes some errors in the ASH performance graphs."— Presentation transcript:
On The Energy Efficiency of Computation Mihai Budiu CMU CS CALCM Seminar Feb 17, 2004 Note: this version fixes some errors in the ASH performance graphs shown
9 Energy and Power Efficiency The energy efficiency metric for energy constrained applications (OP/nJ) = thermal (power) considerations when maximizing throughput (MOPS/mW). JouleWatt OP/nJ = MOPS/mW
10 ISSCC Chips (.18 m-.25 m) #YearDescription #YearDescription 11997S/390 111998Graphics 22000PPC (SOI) 121998Multimedia 31999G5 132000Multimedia 42000G6 142002Mpg decoder 52000Alpha 151998Multimedia 61998P6 162001Encryption Processor 71998Alpha 172000Hearing Aid Processor 81999PPC 182000FIR for Disk Read Head 91998StrongArm 191998MPEG Encoder 102000Comm 202002802.11a Baseband MicroprocessorsDedicatedDSPs #YearDescription
11 Energy Efficiency (MOPS/mW or OP/nJ) 3 orders of magnitude!
12 Outline Introduction Power and Energy Efficiency Synchronous Hardware Efficiency Asynchronous Hardware Efficiency ASH Efficiency Conclusions
13 Explaining the Difference Operations per second: MOPS = f clk £ N op Operations per clock Chip area per operation Efficiency: MOPS/P chip = (f clk £ N op )/ (A chip £ C sw £ V dd 2 £ f clk ) =1/(A op £ C sw £ V dd 2 ) Normalized switched capacitancePower: P chip = A chip £ C sw £ V dd 2 £ f clk
14 Supply Voltage, V dd MOPS/P chip =1/(A op £ C sw £ V dd 2 )
15 Normalized Switched Capacitance, C sw MOPS/P chip =1/(A op £ C sw £ V dd 2 ) 3x
16 Area per operation, A op A op = A chip /N op MOPS/P chip =1/(A op £ C sw £ V dd 2 ) AHA!
40 Conclusions Performance comes at a price Energy efficiency is expressed in ops/nJ or MOPS/mW Dedicated hardware is more power-efficient than microprocessors ASH efficiency competitive with dedicated hardware
Your consent to our cookies if you continue to use this website.