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Mihai Budiu May 23, 2007. Based On Critical Path: A Tool for System-Level Timing Analysis Girish Venkataramani, Tiberiu Chelcea, Mihai Budiu, and Seth.

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Presentation on theme: "Mihai Budiu May 23, 2007. Based On Critical Path: A Tool for System-Level Timing Analysis Girish Venkataramani, Tiberiu Chelcea, Mihai Budiu, and Seth."— Presentation transcript:

1 Mihai Budiu May 23, 2007

2 Based On Critical Path: A Tool for System-Level Timing Analysis Girish Venkataramani, Tiberiu Chelcea, Mihai Budiu, and Seth C. Goldstein, Design Automation Conference (DAC), San Diego, CA, June 4-8, 2007 Girish Venkataramani: summer intern here in 2005 Now graduating from CMU His Ph.D. thesis: A System Level Timing Analysis and Optimization Methodology for Hardware Compilation is based on the Global Critical Path 2

3 Critical Path Longest path between source and sink in DAG 3

4 Synchronous Combinational Circuits Latch clk Longest signal propagating path between two consecutive latches. clk > crit path 4

5 Events = (n 1, t 1 ) (n 2, t 2 ) Events Circuit (V, E) Events = Signal Transitions on edges E 5

6 Chaining of Events Circuit (V, E) 6

7 Timed Graph B A B A t0t0 t1t1 t2t2 t3t3 Dynamic Critical Path = longest path in Timed Graph || (n 1,t 2 ) (n 2,t 2 ) || = t 2 – t 1 7 Event: signal from (A, t 1 ) to (B, t 3 ) Note: easy to model node computation delay too.

8 Goal: Apply to Real Circuits + reg Delay C H/S + reg Delay C H/S + reg Delay C H/S data req i ack i data req i ack i ack o 1 2 3 4 In this work focused on asynchronous 4-way handshake circuits req o

9 Model Stages Using Behaviors + reg Delay C H/S data req i ack i ack o req o BehaviorInput transitions (precondition) Output transitions (postcondition) Computereq i0, req i1, ack 0 req 0, ack i Return to zero reqack 0 req 0 Return to zero ackreq i0, req i1 ack i 9

10 Behaviors can Handle Choice mux arbiter Deterministic (unique) choice Nondeterministic choice 10 In the absence of choice and non-deterministic delays a static analysis can determine the GCP.

11 Runtime: Locally Critical Events BehaviorInput transitions (precondition) Output transitions (postcondition) Computereq i0, req i1, ack 0 req 0, ack i Return to zero reqack 0 req 0 Return to zero ackreq i0, req i1 ack i timeline req i0 req i1 ack 0 req 0 ack i 11

12 GCP Computation Algorithm 12 3. Some transitions repeated 2. Trace back along locally critical input event 1. Start from last node executed 0. At run-time each node records locally critical events

13 Possible Locally Critical Paths 13 ack o req 0 req i ack i req i ack o req 0 ack o ack i req i 1 2 34

14 Chaining Events Backwards 14 ack o req 0 req i ack i req i 2 1 ack o req 0 req i 1 ack o req 0 3 ack o ack i req i 4

15 PATH data = [req]* PATH sync = [ack req ack]* GCP = [PATH data PATH sync ]* Theorem 15

16 What does this mean? 16 PATH data = [req]* Good: wait for data PATH sync = [ack req ack]* Maybe bad: synchronization problem GCP = [PATH data PATH sync ]*

17 An Example 17 req AD [req DEreq EGack GCreq CEack ED] 9 req DEreq EG req GM req MN req AD [req DEreq EGack GJreq JA] 9 req DEreq EG req GM req MN

18 C CASH core Verilog back-end Synopsys, Cadence P/R asynchronous circuit layout ModelSim Input data Execution trace GCP extraction Feedback path Critical Path Toolflow GCP P/R model PLI calls 18

19 Effectiveness 19

20 Is defined as a path on the timed graph. Tracks dependences. Can be computed by automatic tools. Summarizes concurrent computation bottlenecks. Can be incorporated in a feedback loop. to drive optimizations and de-optimizations. Is a profiling (input-dependent) concept. Conclusions: Global Critical Path 20 t0t0 t1t1 t2t2 t3t3


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