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Presentation on theme: "1 7-things that we should know about Op-amp Design Natsem India Designs Pvt. Ltd."— Presentation transcript:

1 1 7-things that we should know about Op-amp Design Natsem India Designs Pvt. Ltd.

2 2 7-things that we should know about Op-amp Design T. Srinivas Staff Engineer Data Converters Group.

3 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India. 3 Objective Op-amp is a fundamental part of Analog Circuit Design. Our aim is to increase your familiarity with Op-amp Design and… Fear of Op-ampIn Analog Circuit Design CourseDesign Systems

4 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India. 4 Contents 1.Small Signal Model of MOSFET. 2.Current Mirrors. 3.Gain Bandwidth Product of an Op-amp. 4.Stability of an Op-amp. 5.Slew-rate of an Op-amp. 6.Offset of an Op-amp. 7.Noise of an Op-amp. Conclusion

5 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Small Signal Model of MOSFET. D S G Triode Region: Saturation Region: V GS1 V GS2 =V GS V GS3 =V GS2 +0.1

6 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Small Signal Model of MOSFET. Regions of Operation Strong inversion V GS > V TH Weak inversion V GS < V TH Triode region V DS < V GS -V TH Saturation V DS > V GS -V TH

7 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Small Signal Model of MOSFET. For Designing Amplifiers, MOSFET Operating in Saturation Region is preferred [I DS depends on Input!]. To achieve -100dB THD V in < (V GS - V TH )*40 V. The small signal model that we show is valid for MOSFET in Saturation Region and for V in << V DSAT. D S G Triode Region: Saturation Region: D S G Vin VDC V GS =VDC+Vin

8 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Small Signal Model of MOSFET. This signal model is sufficient for first-cut hand calculations. V DS = VDD – I DS *R D S G VDC R VDD VDC + v in V DS = VDD – I DS *R – I in *R R g m *V in v out = - g m *v in *R G S D v in C GS r ds Eff

9 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Small Signal Model of MOSFET. Intrinsic Gain r Ds g m *V in v out = - g m *v in *r DS G S D v in D S G To Increase Gain reduce VDSAT or increase length of MOSFET.

10 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Small Signal Model of MOSFET. Intrinsic Bandwidth C GS r Ds g m *V in G S D v in I in I out Gain-Speed Product = To Increase Bandwidth increase V DSAT or decrease the length of MOSFET.

11 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Small Signal Model of MOSFET. L=0.5um L=1.0um L=1.5um L=0.5um L=1.0um L=1.5um L=0.5um L=1.0um L=1.5um

12 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Small Signal Model of MOSFET. Example 1: VDD Vin VDC V OUT M1M1 M2M2 g m2 *0 G r DS1 g m1 *V in S v in r DS2 DC Gain AC Gain

13 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Current Mirrors. Not Again. It doesnt make any sense. These are the Basic Building Blocks of Analog IC design. VDD 10uA V OUT M2M2 M1M1 10uA 0uA 0V 10uA 1V 0uA Let (W/L) 1 =(W/L) 2 VT=0.8V, g DS =0 V OUT = 0.0V I DS2 = 0V OUT = 0.1V I DS2 = 7.5uAV OUT = 0.2V I DS2 = 10uAV OUT = 1.0V I DS2 = 10uA Let (W/L) 2 =2*(W/L) 1 V OUT = 1.0V I DS2 = 20uA V OUT = 0.0V I DS2 = 0V OUT = 0.1V I DS2 = 6.75uAV OUT = 0.2V I DS2 = 9uAV OUT = 1.0V I DS2 = 9uA M2M2 VDD 10uA V OUT M1M1 g DS1 =1e-6 S & g DS2 =0; 1uA 9uA 1V If g DS1 = g DS2 =1e-6; I OUT =10uA V OUT = ??? V OUT =2V I OUT =???

14 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Current Mirrors. Small Signal Analysis VDD 10uA V OUT M2M2 M1M1 r IN r OUT g m2 *V in g m1 *V in G r DS1 S v in r DS2 r IN V OUT r OUT = 0 Due to CGS we have a Pole Here g m2 *V in g m1 *V in G r DS1 S v in r DS2 V OUT C GS1 C GS2

15 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Current Mirrors. Better Current Mirror Large Output resistance. VDD V OUT M1M1 M2M2 M3M3 M4M4 V1 V2 V1 1.M1 – M3 is the Current Mirror. 2.M4 – M2 helps in achieving high resistance. 3.Requires high turn on voltage. V OUT > V1+V DSAT2 V1=V GS3 V2=V GS3 + V GS4 VDD 1.M1 – M3 is the Current Mirror. 2.M4 – M2 helps in achieving high resistance. 3.V OUT > V3 + V DSAT2 > 2*V DSAT V OUT M1M1 M2M2 M3M3 M4M4 M5M5 I1I1 I1I1 V1 V2 V3 V1=V GS3 V2=V GS5 V3=V2 – V GS4 > V DSAT

16 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Current Mirrors. Wide Swing Current Mirror. There are Two Questions that we should answer. 1)How should we generate V2. 2)We know V3 = V DSAT, what is the exact value of. VDD V OUT M1M1 M2M2 M3M3 M4M4 M5M5 I1I1 I1I1 V1 V2 V3 = 1.5 is fine If M1 – M4 are of same size, for = 1.25, (W/L) 5 = 1/5 (W/L). 1/5 (W/L) W/L

17 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Current Mirrors. Example 2: VDC R VDD Vin V OUT Replace the R with MOSFET and Build an 1)Amplifier with Gain = 50 2)Amplifier with Gain of 3 (Kn=3*Kp). VDD Vin V OUT M1M1 M2M2 M3M3 1)If gm=100*g DS Gain = 50. 2)Gain varies with Process. VDD Vin V OUT M1M1 M2M2 1)If (W/L) 2 =(W/L) 1 Gain = 3. 2)Gain varies with Process.

18 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Current Mirrors. Example 3: VDD M 2 (W/L)=2 M 3 (W/L)=1 M 4 (W/L)=1 10uA 20uA 150uA M 1 (W/L)=??? V GS4 + V GS3 = V GS2 + V GS1 (W/L) 1 = 15. The above loop formed by Gate-Source voltages is known as Trans-linear loop. VDD M 2 2*(W/L) M 1 (W/L) (a)(b) M B1 (W/L) V OUT = ? 10uA V OUT will near to VDD M 2 in Triode region M 1 in Saturation Region

19 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Gain Bandwidth Product of an Op-amp. 1 st order Low Pass Filter R C V IN V OUT mag(V OUT ) Phase (V OUT ) V IN V OUT

20 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Gain Bandwidth Product of an Op-amp. Op-amp in Feed-back. + - V IN V OUT Amplifier GBW required to settle in the given time (Ts) and with in given error ( ).

21 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Gain Bandwidth Product of an Op-amp. Example 4: + - V IN V OUT Design a Amplifier with Gain of 4, operating at 100MHz and it should settle with 10-bit accuracy for a full-scale output of 1V.

22 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Stability of an Op-amp. We use simple design technique to deal with stability issues. This approach is sufficient to deal with most of the circuits and systems. V IN = 1V V OUT I Designed an Oscillator. Phase Margin is not enough. Poles are not in the right location. Lets Change some W/Ls and see.

23 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Stability of an Op-amp. Two-Stage Amplifier VNVP VDD M1M1 M2M2 M3M3 M4M4 M5M5 I1I2 V OUT C CLCL Poles g mi. v IN g dsi sC 1 g mo. v 1 g dso sC L v1v1 sC C V OUT v IN V V*g m5 V OUT V OUT =0

24 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Stability of an Op-amp. Two-Stage Amplifier V IN V OUT VP VN Op-amp in Feedback should be stable.

25 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Stability of an Op-amp. Two-Stage Amplifier- Condition for Maximally flat response. V IN V OUT VP VN Equate it to 2 nd order Butterworth equation. To satisfy Assumption, We use the following rule of thumb.

26 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Stability of an Op-amp. Example 5: V IN V OUT VP VN Design a Amplifier with Gain of 2, operating at 1MHz and when 1V input is applied output should settle with in 2V ± 2mV. [A 0 =1e7]

27 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Slewrate of an Op-amp. V IN = 2V V OUT = 2V VDD = 5V M1M1 M2M2 M3M3 M4M4 M5M5 I1I2 V OUT C CLCL 2V 4V V IN = 3V 3V 2V 3.8 3V 4V 2V 3V V OUT = 3V Linear system Slew-rate limited 1V 2V 3V A Slew-rate limited system will cause non-linearity.

28 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Slewrate of an Op-amp. Often in switched capacitor circuits, output stage current limitation leads to op-amp slewing. In continuous time circuits where we have to drive resistor loads, output stage current limitation leads to non-linearity. V IN = 2V V OUT V IN = 2V Output Stage current limited Output Stage can supply huge current

29 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Slewrate of an Op-amp. Class-AB output stage should be used when driving resistor loads and some switched capacitor circuits. Class-AB input stage can be employed to reduce power. VPVP VNVN VDD = 5V M1M1 M2M2 M3M3 M4M4 M 11 I1 V OUT C CLCL I2 M6M6 M5M5 C M7M7 M8M8 M9M9 M 10 M 12 Two-stage op-amp with class-AB output stage

30 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Slewrate of an Op-amp. Design Considerations for Slewrate (Switched capacitor Circuits). T CLK T CLK /2 T Settle T Slew

31 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Slewrate of an Op-amp. Example 6: V IN V OUT 2 1 CLCL CSCS CFCF VDD = 5V M1M1 M2M2 M3M3 M4M4 I1 I2 M6M6 M5M5 M7M7 M8M8 2.5V Design a Amplifier with Gain of 2 for 10-bit ADC, operating at clock frequency of 1MHz with a Maximum input amplitude of 1V. Assume C F =1pF and C L =1pF.

32 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Slewrate of an Op-amp. Example 6: CLCL CFCF CPCP CSCS v IN v OUT gm*v 1 g DS v1v1

33 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Slewrate of an Op-amp. Example 6: What is this

34 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Slewrate of an Op-amp. Example 6: Op-amp Cant supply Infinite current. v IN CLCL CFCF CPCP CSCS v OUT gm*v 1 g DS v1v1

35 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Slewrate of an Op-amp. Example 7: Below op-amp should be designed for a Slewrate of 6V/us, what should be the input stage tail current if the op-amp is folded cascode op-amp. VIP, VIN forms fully differential signals (2V PP ) with VCM as common mode. VCM=1V VIP VIN 10pF 1pF Parasitic Caps. Minimum Tail Current = 12uA.

36 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Offset of an Op-amp. 1. Systematic Offset: 20uA100uA VDD = 5V M1M1 M2M2 M3M3 M4M4 M5M5 V OUT C CLCL 5.3u/1.5u 10*15u/1.5u 15u/1.5u 10uA 2.5V Case 1: VDSAT and Length of M 3 -M 4 & M 5 are same. Offset=48uV Case 2: VDSAT of M 3 -M 4 & M 5 is same but Length is different Offset=715uV 10*5u/0.5u40*15u/1.5u Case 3: Length of M3-M4 & M5 is same but VDSAT is different Offset=718uV

37 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Offset of an Op-amp. 2. Random Offset : Due to Process Variations 100uA VDD = 5V M1M1 M2M2 M3M3 M4M4 M5M5 V OUT C M6M6 M7M7 V4V4 V2V2 V5V5 V7V7 20uA Process steps like Photolithography, Etching and Deposition are not uniform. Values of V 1,V 2, V 3 depends on the sigma of the process. Normally they will be in the order of mV. Proper layout [Common-Centroid Layout, proximity matching] techniques can reduce the mismatch, thus Offset. Can a designer play a role in reducing the over-all Offset.

38 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Offset of an Op-amp. 2. Random Offset : Due to Process Variations V 5 =(g m7 *V 7 /g m5 ) V7V7 100uA + g m7 *V 7 VDD = 5V M1M1 M2M2 M3M3 M4M4 M5M5 V OUT C M6M6 M7M7 20uA V IN Input Referred Offset Due to: V B2 & V 5 100uA V IN + V 5 /A 1

39 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Offset of an Op-amp. 2. Random Offset : Due to Process Variations Input Referred Offset Due to: V 2 & V 4 VDD = 5V M1M1 M2M2 M3M3 M4M4 M5M5 V OUT C M6M6 M7M7 V4V4 20uA V IN 10uA + g m4 *V 4 V IN +(g m4 /g m2 )*V 4

40 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Offset of an Op-amp. 2. Random Offset : Due to Process Variations Design M 1 -M 2 (Differential Pair) and M 3 -M 4 (Current Mirror) Carefully. Decrease g m4 (For given I Increase V DSAT for Current Mirrors). Increase g m2 (For given I Decrease V DSAT for Differential pair). To reduce V 2 and V 4, use Large devices (Large L and Large W). Mismatch is inversely proportional to the Area of the MOSFET.

41 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Noise of an Op-amp. Types of Noise Interference –Cross talk, Clock Coupling… –Supply Noise. Taken Care by proper design (Shielding, Differential circuits, etc…) Device Noise –Thermal Noise (Fundamental). –Process related (1/f noise).

42 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Noise of an Op-amp. Thermal Noise: Dissipative elements (resistors, MOSFETs, …) Random fluctuations of v(t) of i(t). White noise with zero mean. Resistor MOS Noise (Strong inversion) * R

43 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Noise of an Op-amp. kT/C Noise (Resistor): R * R C C 100nF 1K100K Case 1: Case 2: 100nF 1K 100K Total Noise=200nV

44 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Noise of an Op-amp. kT/C Noise (Op-amp): VDD = 5V M1M1 M2M2 M3M3 M4M4 M5M5 V OUT C M B1 M B2 VP VN i n1 2 i n2 2 i n4 2 i n3 2 Noise Analysis is Similar to offset Analysis We can neglect the noise due to M 5 & M BX. Assume g m1 =g m2 & g m3 =g m4 Calculating the input referred noise. vn2vn2

45 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Noise of an Op-amp. kT/C Noise (Op-amp): vn2vn2 A(s) Vout For =1, C C =10pF and g m1 =g m3 =80uS Noise at the output Vout RMS =32uV. 1/f - noise is suppressed by assigning kf=0 Output Noise Total Noise=40uV Caution: RHS Zero is neglect for calculations, for a poor design it will increase the total output - noise drastically.

46 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Noise of an Op-amp. 1/f Noise (Fake Noise): Caused by traps in semiconductor material –Due to contamination or crystal defects Has a 1/f power spectral density Figure of Merit is called K f and K f =A/Tox B. K f is process dependent. For T OX >90 0 A, NMOS(K f ) > PMOS(K f ). So PMOS is less noisy.

47 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India Noise of an Op-amp. 1/f Noise (Fake Noise): 1V W/L W/L=35u/1u W/L=70u/2u W/L=140u/1u K f =1.36e-27, I DS =500uA f lo =1Hz, f hi =1MHz, Tox=125 0 A W/L=140u/1u I RMS =40nA

48 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India. 48 CONCLUSION I hope the topics covered would be useful as a starting point and help you to extend the concepts to system level issues. I express my gratitude to following people: –Inventors of Google. –My Professors at IIT Madras. –For Natsem India and RVCE. –For SANYO Japan.

49 National Semiconductor Corporation Confidential 7-things that we should know about Op-amp Design Data Converters Group, India. 49 About Author Area of Interest: Analog/Mixed-signal Integrated Circuit Design, with focus on Data converters. Education: M.Tech, Microelectronics and VLSI Design, IIT Madras, Chennai, B.Tech, Electronics & Communications, S.V University, Tirupati, Work Experience Associated with SANYO LSI, India (Feb 01 - April 05). Associated with Natsem, India (May 05 - Present). Design Experience: Multi-stage rail-to-rail operational amplifiers, Switched capacitor Circuits. Architectures for 20-bit/24-bit ADC/DAC.

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