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MSTP Reflection VectorIEEE March 2005 Atlanta 1 MSTP Reflection Vector Norman Finn, Cisco Systems

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MSTP Reflection VectorIEEE March 2005 Atlanta 2 The use of a separate spanning tree per source node to garner the advantages of IP-style routing at Layer 2 is not new. However, it has not proven easy to apply that idea to bridges. (The problem solved by the Reflection Vector, below, is one that is easy to miss.) An incremental advance to the 802.1S Multiple Spanning Tree Protocol enables bridges to offer optimal across Layer 2 networks. Abstract

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MSTP Reflection VectorIEEE March 2005 Atlanta 3 Symmetrical Spanning Trees

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MSTP Reflection VectorIEEE March 2005 Atlanta 4 9 Bridges A-I, connected as shown. Letters are Bridge IDs. Lower letter (A) is better than higher letter (D). Numbers are path costs. Each pair of bridges agrees on links path cost. Spanning Tree Uses Sub-Optimal Paths (Well, it does now.) B A C D I E H G F

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MSTP Reflection VectorIEEE March 2005 Atlanta 5 Bridge A is the Root Bridge. Bridge E breaks the two spanning tree loops by blocking the marked ports. Path from E to G is E-F-I-A-B-D-G. This clearly qualifies as sub-optimal. Spanning Tree Uses Sub-Optimal Paths B A C D I E H G F

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MSTP Reflection VectorIEEE March 2005 Atlanta 6 Instead of 1 spanning tree, we create 9 spanning trees. Each bridge is the root of its own spanning tree instance (STI) S (MSTP) supports 64 STIs trivially, 4k with modest effort. But, we should be able to do better! B A C D I E H G F

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MSTP Reflection VectorIEEE March 2005 Atlanta 7 Whenever Bridge A sends a frame, it uses VLAN A, which is attached to STI A. Of course, the STI with A as the root is the optimal path is always straight away from A, along the least-cost path. But, we should be able to do better! B A C D I E H G F

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MSTP Reflection VectorIEEE March 2005 Atlanta 8 Similarly, traffic originating from Bridge D uses VLAN D on STI D, and thus takes the optimal path from D to its destination. But, we should be able to do better! B A C I E H G F D

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MSTP Reflection VectorIEEE March 2005 Atlanta 9 All STIs use the same FID. What about MAC address learning? B C I E H G F D A

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MSTP Reflection VectorIEEE March 2005 Atlanta 10 MAC address learning absolutely depends on symmetrical paths. You can learn the source MAC address X in a from X to Y only if the path from X to Y is identical to the path from Y to X. Thats what spanning tree is all about. Can anything go wrong? YES!

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MSTP Reflection VectorIEEE March 2005 Atlanta 11 Asymmetrical Spanning Trees For example, suppose the VLANs rooted on Bridges A and E are blocked as shown. The path from E to A is E-H-C-B-A. The path from A to E is A-I-F-E. B A C D I E H G F

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MSTP Reflection VectorIEEE March 2005 Atlanta 12 Asymmetrical Spanning Trees If A learns Es address and transmits a frame for E towards B, the frame will hit the blocked port H-E and not get to E. Basically, nothing works. B A C D I E H G F

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MSTP Reflection VectorIEEE March 2005 Atlanta 13 Asymmetrical Spanning Trees But, if the two spanning trees are symmetrical, then A-B-C-H-E is used for both directions, and MAC address learning works just fine. B A C D I E H G F

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MSTP Reflection VectorIEEE March 2005 Atlanta 14 Asymmetrical Spanning Trees Root of each MSTP BPDU says, I did (not) chose this route on this STI. Needs one bit vector of other STIs for each STI Relayed from each root down the trail. Among equal-cost root ports, I must select one receiving a lower did indication. There may be more than one, e.g. E receiving A. B A C D I E H G F

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MSTP Reflection VectorIEEE March 2005 Atlanta 15 Asymmetrical Spanning Trees This is how the 9 STIs would be created if we do nothing. Many STI pairs are compatible, e.g. A-I, B- F, and D-H. But some are not, e.g. A-E, D-F, and B-E. B A C D I E H G F

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MSTP Reflection VectorIEEE March 2005 Atlanta 16 Asymmetrical Spanning Trees This layout would be perfect. But, how do we get there? B A C D I E H G F

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MSTP Reflection VectorIEEE March 2005 Atlanta 17 Because link costs can be configured, as well as computed from the link speed, the two bridges on the two ends of the link can disagree on the link cost used in the STP algorithm. This makes the symmetrization much more difficult. Coordinating path costs

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MSTP Reflection VectorIEEE March 2005 Atlanta 18 So, carry a little extra in MSTP to ensure that both bridges use the same link cost! The bridge advertises its link configured costs in obMSTP BPDUs. All bridges on a given LAN use the link costs advertised by the CSTI Designated Bridge. The CSTI does not play this game. One link cost parameter is required for each STI. Coordinating path costs

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MSTP Reflection VectorIEEE March 2005 Atlanta 19 Identifying the core of the problem When can STP break loops asymmetrically? A ring with an odd number of nodes cannot have a problem; routes are always symmetrical. A ring with an even number of nodes has two equal paths from one side to the other, and so can have asymmetrical paths. Odd OK C D B A E V X W U YZ Even Bad Cost = 2 Cost = 3 X X X X X == point opposite root on ring

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MSTP Reflection VectorIEEE March 2005 Atlanta 20 Identifying the core of the problem The addition of link costs changes the definition of odd and even, but not the nature of the problem. If the point opposite me on this loop (X) is a link, Im OK, and if a bridge, I may be in trouble. Even bad D E H A F D E H G FG Odd OK Cost = 3 X X X X == point opposite root on ring X X

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MSTP Reflection VectorIEEE March 2005 Atlanta 21 It has been observed often, in IEEE 802.1, that when a bridge has equal root path costs to choose from, any decision it makes for its Root Port is perfectly compatible with the spanning tree algorithms. But, Root Port selection can be changed!

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MSTP Reflection VectorIEEE March 2005 Atlanta 22 Problems are always visible at both ends As long as the link costs are forced to be symmetrical: If any Bridge X has an equal-cost root port choice on STI Y, then Bridge Y has an equal-cost root port choice on STI X! B A C D I E H G F

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MSTP Reflection VectorIEEE March 2005 Atlanta 23 The Reflection Vector

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MSTP Reflection VectorIEEE March 2005 Atlanta 24 If both ends know about the problem, they should be able to do something about it! So, we add, for each STI in the MSTP BPDU, a Reflection Vector containing one bit of information about each of the other STIs. Aha!

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MSTP Reflection VectorIEEE March 2005 Atlanta 25 The Reflection Vector A slightly different diagram lets us flesh out the details of the Reflection Vector. Looking at exactly two STIs, rooted at Bridges A and I, we see that Bridges B and E will each want to block one port for one of the two STIs. B C D I E H G A R R

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MSTP Reflection VectorIEEE March 2005 Atlanta 26 The Reflection Vector Lets look at the two Roots BPDUs, and see what each STIs Reflection Vector says about the others STI. The box is the color of the BPDU, the letter inside shows what the vector says about the other Roots STI. B C D I E H G A YYNNNYYNYYYYNNNN R R

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MSTP Reflection VectorIEEE March 2005 Atlanta 27 The Reflection Vector When the Root Bridge initiates the Reflection Vector, all of the other STIs bits are Yes. B C D I E H G A YYNNNYYNYYYYNNNNYY R R

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MSTP Reflection VectorIEEE March 2005 Atlanta 28 R R The Reflection Vector A bit in a Reflection Vector received from the Root Port is passed unchanged through all of the receivers Designated Ports that are not blocked on that bits STI. B C D I E H G A YYNNNYYNYYYYNNNN

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MSTP Reflection VectorIEEE March 2005 Atlanta 29 The Reflection Vector When the Reflection Vector from the Root Port is passed through a port that is blocked on any STI, that STIs bit is set toNo in the Reflection Vector, whatever its former value. B C D I E H G A YYNNNYYYYYYYNNNN R R

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MSTP Reflection VectorIEEE March 2005 Atlanta 30 The Reflection Vector This rule applies to the ports on the Root Bridge, as well. Assuming E is a Root Bridge in the above diagram, the A bit of its Reflection Vector are No on the port(s) that block STI A. B C D E H G A YYNNNYYYYYYNNN R R

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MSTP Reflection VectorIEEE March 2005 Atlanta 31 The Reflection Vector Whenever a bridge receives a No bit from any other STI on its own STIs Root Port, it knows that it is not in synch with that other STI, and that something needs to be done. C D I H G A YYNNNYYYYYYNNN B E ! ! NN ! R R !

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MSTP Reflection VectorIEEE March 2005 Atlanta 32 The Reflection Vector If the bridge has an Alternate Port that: 1.Has the same Root Path Cost as the Root Port; and 2.Is receiving a Yes from the STI in question; And if the Root ID comparison so indicates; Then the bridge selects as the Root Port any Alternate Port that has the same Root Path Cost, but a Yes for that other STI. C D I H G A YYNNNYYYYYNNN B E ! NN ! ! R R Y

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MSTP Reflection VectorIEEE March 2005 Atlanta 33 The Reflection Vector Bridges A and I have no Alternate Ports of equal cost to their Root Ports, so cannot do anything. Root Bridge A is superior to Root Bridge I, so Bridge B does nothing. Only Bridge E meets all the criteria. It selects a new Root Port from among its Alternate Ports. C D H G YYNNNYYYYYNNN B E NN ! Y I A ! ! R R

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MSTP Reflection VectorIEEE March 2005 Atlanta 34 The Reflection Vector However, Bridge E does not advertise its decision! It continues to advertise information about what it would do if left to itself; otherwise, a chain of dependencies could slow convergence even further. B C D I E H G A YYNNNYYNYYYYNNNN R R

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MSTP Reflection VectorIEEE March 2005 Atlanta 35 Convergence Times

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MSTP Reflection VectorIEEE March 2005 Atlanta 36 Convergence times In general, spanning trees converge by: Various bridges claims to being the Root Bridge propagate outward in expanding claim domains from the best bridges. As the claim domains collide, the best bridge wins, until one bridges claim domain covers the whole network. All STIs converge simultaneously; they dont depend on each other.

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MSTP Reflection VectorIEEE March 2005 Atlanta 37 Convergence times So, As claim reaches E at the same time Is claim reaches B. As Reflection Vector, however, cannot be computed until it knows Is claim. Therefore, an extra trip across the network may be required for As Reflection Vector to reach E. B C D I E H G A R R

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MSTP Reflection VectorIEEE March 2005 Atlanta 38 Worst case convergence time: A and B die at the same time. (Note that the letters have changed.) Wave 1: Ds (Cs) claim to being root propagates to C (D). Wave 2: Cs (Ds) better claim to being root propagates back to D (C). Wave 3: The Reflection Vectors propagate. K L B H G A C D

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MSTP Reflection VectorIEEE March 2005 Atlanta 39 Drat! So, this plan can converge more slowly than standard MSTP, because of the extra wave of information. Bottom line: Convergence is slower.

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MSTP Reflection VectorIEEE March 2005 Atlanta 40

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