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3/18/20041 A Direct Conversion CMOS Transceiver for IEEE802.11a WLANs Pengfei Zhang RF Micro Devices, San Jose, California.

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Presentation on theme: "3/18/20041 A Direct Conversion CMOS Transceiver for IEEE802.11a WLANs Pengfei Zhang RF Micro Devices, San Jose, California."— Presentation transcript:

1 3/18/20041 A Direct Conversion CMOS Transceiver for IEEE802.11a WLANs Pengfei Zhang RF Micro Devices, San Jose, California

2 3/18/20042 Outline Introduction Transceiver Architecture Frequency Planning Circuit Design Measured Results Conclusion

3 3/18/20043 Wireless Connectivity WLAN Bluetooth Cellular GPS

4 3/18/20044 WLAN - Mobility vs. Bit Rate Mb/s Outdoor Stationary Walk Vehicle Indoor Stationary/ Desktop Walk Mobility WLAN (IEEE a/b/g) Bit Rate LAN W-CDMA/ EDGE Bluetooth Zigbee (IEEE )

5 3/18/20045 WLAN - Cost vs. Bit Rate Mb/s ,1 User Cost / bit HIPERLAN/2 Bit Rate LAN Low Medium High Very Low $ WLAN (IEEE a/b/g) LAN W-CDMA/ EDGE W-CDMA/ EDGE Bluetooth Zigbee (IEEE )

6 3/18/20046 Two-Chip WLAN System Ref. J. Bohac, Flexible chipset arms a/b/g WLANs, Microwaves and RF, May 2003

7 3/18/20047 Design Goals Design Goals: To exceed standard performance requirement, achieve low power consumption and low cost

8 3/18/20048 Direct Conversion vs. Low-IF Conversion (I)

9 3/18/20049 Direct Conversion vs. Low-IF Conversion (II) Image Response –Direct conversion: No Image –Low-IF conversion: Analog image rejection – I/Q matching, Circuit complexity DSP image rejection – large ADC dynamic range required ADC Sampling Rate f f low-IF conversion = 2*f direct conversion Baseband Filters –Direct conversion: BW ~ 10 MHz –Low-IF conversion: BW ~ 20 MHz More Power!

10 3/18/ Transceiver Architecture LNA 5.25GHz 90 o 0o0o LO-0 o LO-90 o RF IN RF OUT AGC LPF AGC To ADC Receiver LPF LO-0 o LO-90 o From DAC From DAC PAD Transmitter Synthesizer

11 3/18/ Example of Frequency Planning (Ref.[2]) Avoid pulling, reduce LO-RF interaction However, unwanted sideband at /3: –RX: image in highly populated band (1.8GHz) –TX: degrades efficiency; FCC requirement Unwanted Sideband Mixer Divider VCO 2 cos(2 t/3) cos( t/3) sin( t/3) cos( t)+cos( t/3) sin( t)+sin( t/3)

12 3/18/ Proposed Frequency Planning Quadrature VCO: cross coupled LC resonators SSB Mixer: suppress unwanted sideband LO Driver SSB Mixer Divider BufferVCO 2 3.5GHz 1.75GHz 5.25GHz cos(2 t/3) sin(2 t/3) cos( t/3) sin( t/3) cos( t) sin( t)

13 3/18/ IM2 of Multi-carrier Ref. K. Cai, P. Zhang, Microwave Journal, Feb. 2004

14 3/18/ ADS Simulation of IM2 Impairment Ref. K. Cai, P. Zhang, Microwave Journal, Feb. 2004

15 3/18/ Receiver Architecture 7 th order Chebyshev leapfrog LPF Improved IP2: AC coupled RF, fully diff baseband DC offset compensation: 7b DAC; Look-up-table Notch Filter AGC LPF AGC To ADC Notch Filter DAC LNA V/I Converter LO-0 o LO-90 o RF IN From baseband LUT I Q

16 3/18/ Mixer Design Conventional single balanced mixer: tradeoff between 1/f noise and linearity Two-stage mixer: Independent biasing I2: linearity, I1: 1/f noise I1 M1 M2 M3 R1 R2 Out+ Out- LO+ LO- RF C1 L1 I1 M1 M2 M3 R1 R2 Out+Out- LO+LO- C1 I2 RF C2

17 3/18/ Digital Gain Control: R-2R Ladder R/6 Sj1 Sj3 Sj4 Sj5 Sj2 Sj0 S(j-1)0 I1 VOUT R2R RR R S00Sn0Sj0 S10 Mixer Current I1 VDD When Sjk=1, Gjk=-6*j+20LOG(1+k/6) (dB) Mixer resistive load: 10-section R-2R ladder Monotonic, linear, fast settling and Constant Rout

18 3/18/ Notch Filter: Active-LC Trap Partial channel selection filter to relax linearity requirement of baseband stages Synthesized L takes minimal silicon area Large low frequency impedance of C1 minimize flicker noise contribution from M5 R1 I1 C2 C1 M5 VDD Vout Mixer

19 3/18/ AGC For an input signal ramping in power, the RX gain is adjusted to maintain a constant output signal power level. Although the RX noise figure increases in low gain settings, the output SNR remains higher than 34 dB in the entire dynamic range.

20 3/18/ RX LPF Frequency Response

21 3/18/ Transmitter Architecture LPF: 4 th order Butterworth Off-chip PA used for system power saving Offset Control LPF Offset Control LPF LO-0 o LO-90 o From DAC PA Driver From DAC Power Amp I Q

22 3/18/ TX LPF Frequency Response

23 3/18/ Transmitter RF Front-end LO leakage: Mixer DC offset tuning D/S converter: No need of off-chip balun Programmable Pout: Binary weighted PA driver offset tuning Vbbi Vbbq LOq LOi L1L2 Vdd RFout R0 M0 C0 M4 M3 R1 M1 C1 R2 M2 C2 D0 D1 D2 C3 D/S Converter

24 3/18/ Frequency Synthesizer Automatic VCO band selection Accumulation mode NMOS varactors Off-chip 40 MHz XTAL and loop filter (~200 KHz) PFD N decision timer M 3.5GHz XTAL VH VL Band Selection

25 3/18/ VCO Frequency Bands

26 3/18/ Die Photo 0.18 m 1P-6M CMOS with MIM-C

27 3/18/ Receiver Gain & Noise Figure

28 3/18/ Receiver Sensitivity

29 3/18/ TX Transmit Spectrum

30 3/18/ TX Transmit Spectrum

31 3/18/ PAPR in OFDM System 52 Subcarriers: 17dB (=10*log52) PAPR

32 3/18/ Peak Power Probability Large peaks do not occur very often (Gaussian distribution)

33 3/18/ TX Transmit Spectrum

34 3/18/ Transmit Constellation Output power: 16.2dBm 64QAM, 54Mb/s Average EVM: 3.41%, -29.3dB

35 3/18/ LO Spectrum

36 3/18/ LO Phase Noise

37 3/18/ RX Switch On Settling Time

38 3/18/ TX Switch On Settling Time

39 3/18/ Performance Summary * External PA used

40 3/18/ Conclusion CMOS Direct-Conversion Transceiver with integrated VCO and frequency synthesizer fully compliant with IEEE a standard Exceeding standard performance requirement with low power consumption and small die area


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